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* arm: mxs: Preprocess u-boot.bd so they contain full pathMarek Vasut2013-05-06-4/+14
| | | | | | | | | | | | | | | | The u-boot-imx23.bd and u-boot-imx28.bd need to be preprocessed, otherwise they have issues with out-of-tree build where elftosb tool couldn't sometimes find the u-boot.bin and spl/u-boot-spl.bin . Preprocess these .bd files with sed and insert full path to u-boot.bin and spl/u-boot-spl.bin to prevent this issue. Moreover, to avoid adding more churn into main Makefile, move all this preprocessing and u-boot.sb generation into CPU directory instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* arm: mx23: Fix VDDMEM misconfigurationMarek Vasut2013-05-06-20/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | The VDDMEM ramped up in very weird way as it was horribly misconfigured. Instead of setting up VDDMEM in one swipe, let it rise slowly the same way as VDDD and VDDA in spl_power_init.c and then only clear ILIMIT before memory gets inited. This makes sure the VDDMEM rises sanely, not jumps up and down as it did till now. The VDDMEM prior to this change did this: 2V0____ .--------2V5 | `--' 0V____| The VDDMEM now does this: 2V0_____,-----------2V5 / 0V__| Moreover, VDDIO on MX23 uses 25mV steps while MX28 uses 50mV steps, fix this difference too. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* mxs: Explain why some mx23 DDR registers are not configuredFabio Estevam2013-05-06-0/+9
| | | | | | | Put an explanation in the source code as to why some DDR registers do not need to be configured. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx23: Operate DDR voltage supply at 2.5VFabio Estevam2013-05-06-2/+2
| | | | | | | After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage at the recommended 2.5V voltage level again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx: mx5: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-1157/+1
| | | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Marek Vasut <marex@denx.de>
* imx: iomux-v3: Add iomux-mx53.hBenoît Thébaudeau2013-05-05-0/+1232
| | | | | | | | Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX53. The content of the file is taken from Freescale's Linux kernel at commit 4ab3715, plus the required changes to make it work in U-Boot. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-v3: Add missing definitions to iomux-mx51.hBenoît Thébaudeau2013-05-05-27/+124
| | | | | | | | Add missing definitions that are required by future changes. By the way, make some cosmetic cleanup. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-mx51: Fix MX51_PAD_EIM_CS2__GPIO2_27Benoît Thébaudeau2013-05-05-1/+1
| | | | | | | In ALT1 mode, EIM_CS2 is GPIO2[27], not ESDHC1.CD. Hence, rename MX51_PAD_EIM_CS2__SD1_CD to MX51_PAD_EIM_CS2__GPIO2_27. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: mx35: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-764/+0
| | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-v3: Add iomux-mx35.hBenoît Thébaudeau2013-05-05-1/+1277
| | | | | | | | Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX35. The content of the file is taken from Linux kernel at commit 267dd34, plus the required changes to make it work in U-Boot. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: mx25: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-570/+0
| | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-v3: Add iomux-mx25.hBenoît Thébaudeau2013-05-05-1/+550
| | | | | | | | Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX25. The content of the file is taken from Linux kernel at commit 267dd34, plus the required changes to make it work in U-Boot. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* arm: mx5: Add NAND clock handlingMarek Vasut2013-05-05-2/+13
| | | | | | | | | | | | | Augment the MX5 clock code with function to enable and configure NFC clock. This is necessary to get NFC working on MX5. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
* arm: mx5: Add SPL support code to MX5Marek Vasut2013-05-05-0/+19
| | | | | | | | | | | | Fix minor adjustments needed to get SPL framework building on MX5. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
* arm: imx: Pack u-boot.bin into uImage for SPLMarek Vasut2013-05-05-4/+10
| | | | | | | | | | | | | | | The U-Boot SPL can parse the uImage format and gather information from it about the payload. Make use of this and wrap u-boot.bin into uImage format. The benefit is the SPL will know the size of the payload instead of using fixed size of the payload defined at compile time. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
* mxs: spl_mem_init: Change EMI port priorityFabio Estevam2013-05-05-1/+1
| | | | | | | | | FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL as 0x2, which means: PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registersFabio Estevam2013-05-05-2/+15
| | | | | | | | | | | | | HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per FSL bootlets code. mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved". HW_DRAM_CTL8 is setup as the last element. So skip the initialization of these DRAM_CTL registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Remove erroneous DDR settingFabio Estevam2013-05-05-4/+0
| | | | | | | | On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18. Remove this erroneous setting. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Fix comment about start bitFabio Estevam2013-05-05-1/+1
| | | | | | Start bit is part of HW_DRAM_CTL8 register, so fix the comment. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx23: Fix pad voltage selection bitFabio Estevam2013-05-05-0/+4
| | | | | | | | | | | | | | | | On mx23 the pad voltage selection bit needs to be always '0', since '1' is a reserved value. For example: Pin 108, EMI_A06 pin voltage selection: 0= 1.8V (mDDR) or 2.5V (DDR1); 1= reserved. Fix the pad voltage definitions for the mx23 case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* tools: arm: imx: Implement BOOT_OFFSET command for imximageMarek Vasut2013-04-28-0/+30
| | | | | | | | | | | | | | | | | | | | Implement BOOT_OFFSET command for imximage. This command is parallel to current BOOT_FROM command, but allows more flexibility in configuring arbitrary image header offset. Also add an imximage.cfg with default offset values into arm/arch/imx-common/ so the board-specific imximage.cfg can include this file to avoid magic constants. The syntax of BOOT_OFFSET command is "BOOT_OFFSET <u32 offset>". Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* imx: iomux-v3: Include PKE and PUE to pad control pull definitionsBenoît Thébaudeau2013-04-28-11/+9
| | | | | | | | | | | | | | | | | PUE requires PKE to mean something, as do pull values with PUE, so do not compell users to explicitly use PKE and PUE everywhere. This is also what is done on Linux and what has already been done for i.MX51. By the way, remove some unused pad control definitions. There is no change of behavior. Note that SPI_PAD_CTRL was defined by several boards with a pull value, but without PKE or PUE, which means that no pull was actually enabled in the pad. This might be a bug in those boards, but this patch does not change the behavior, so it just removes the meaningless pull value from those definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-v3: Restore Linux's NEW_PAD_CTRL() macroBenoît Thébaudeau2013-04-28-0/+3
| | | | | | This macro will be useful for future changes. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-v3: cosmetic: Reorganize definitionsBenoît Thébaudeau2013-04-28-14/+19
| | | | | | | Keep pad control definitions together, and organize definitions in a more legible way. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: iomux-v3: Fix common pad control definitionsBenoît Thébaudeau2013-04-28-23/+28
| | | | | | | | | | | | | Commit dc88403 "iomux-v3: Place pad control definitions into common file" broke mx51_efikamx because it made i.MX6's pad control definitions conflict with i.MX51's. i.MX51's pad control definitions are actually common to some other i.MX (25/35/53), so move them to the common iomux-v3.h (just like what is done in Linux's), and select the correct definitions depending on whether CONFIG_MX6 is defined or not. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* Add mxc_ocotp driverBenoît Thébaudeau2013-04-28-0/+15
| | | | | | Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* Add fsl_iim driverBenoît Thébaudeau2013-04-28-0/+3
| | | | | | Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: Add useful fuse definitionsBenoît Thébaudeau2013-04-28-3/+61
| | | | | | Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: Homogenize and fix fuse register definitionsBenoît Thébaudeau2013-04-28-21/+34
| | | | | | | | | | | | | | | | | | IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx23: Put back RAM voltage level to its original valueFabio Estevam2013-04-28-2/+2
| | | | | | | | | | commit 5c2f444c9 (mxs: Reset the EMI block on mx23) changed the DDR voltage level, which causes mx23evk to fail to load a kernel. Put back the original values, so that mx23evk can boot a kernel again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Robert Nelson <robertcnelson@gmail.com>
* mx53ard: Move register masks into imx-regs.hFabio Estevam2013-04-25-0/+2
| | | | | | | imx-regs.h is more appropriate location for containing register masks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mx5: Define a common get_board_rev()Fabio Estevam2013-04-25-0/+7
| | | | | | | | | | When booting a FSL kernel based on 2.6.35 it is necessary to pass the revision tag to the kernel. Place a common weak function into soc.c for such purpose. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* wandboard: Add support for Carrier Board MicroSD cardOtavio Salvador2013-04-25-0/+7
| | | | | | | | Allow use of the carrier board MicroSD card available in the Wandboard; this allow for loading alternative system from the other card for testing or upgrade proposes. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* wandboard: Add card detection for SOM MicroSD cardOtavio Salvador2013-04-25-0/+1
| | | | | | | | This add support to identify if the card is connected or not; so it does not try to communicate with the controller if no card is available. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* nitrogen6x: Setup CCM_CCOSR registerFabio Estevam2013-04-25-0/+1
| | | | | | | | | | | | CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard. Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers." Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx35 iomux: correct input select register indexPhilip Paeps2013-04-25-0/+1
| | | | | | | | Prior to this fix, calls to mxc_iomux_set_input() for registers after MUX_IN_GPIO2_IN_19 would write to the wrong registers, possibly resulting in unexpected behaviour. Signed-off-by: Philip Paeps <philip@paeps.cx>
* arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.hStefan Roese2013-04-25-86/+86
| | | | | | | | | Add spaces before and after "<<". Please note that I intentionally didn't wrap the > 80 lines for the sake of better readability. Signed-off-by: Stefan Roese <sr@denx.de>
* imx: Add titanium board support (i.MX6 based)Stefan Roese2013-04-22-2/+5
| | | | | | | | | | Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-04-22-0/+17
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* dma: Add i.MX6 support to drivers/dma/apbh_dma.cStefan Roese2013-04-22-1/+33
| | | | | | | | | This will be used by the i.MX6 NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Move some i.MX common functions into the imx-common directoryStefan Roese2013-04-22-63/+97
| | | | | | | | | | | | | | | | | | This patch moves the following functions into the imx-common directory: - mxs_wait_mask_set() - mxs_wait_mask_clr() - mxs_reset_block() These are currently used by i.MX28. But the upcoming GPMI NAND port for i.MX6 will also use these functions. So lets move them to a common location to re-use them. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-04-22-20/+20
| | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Add solo-lite variant supportFabio Estevam2013-04-22-3/+132
| | | | | | | | | mx6 solo-lite is another member of the mx6 series. For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* iomux-v3: Place pad control definitions into common fileFabio Estevam2013-04-22-55/+26
| | | | | | | Instead of having the same PAD control definition in each MX6 variant pin file, place it into a common location. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'next'Stefano Babic2013-04-21-17/+9
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| * arm: imx: Change iomux functions to void typeStefan Roese2013-04-16-15/+7
| | | | | | | | | | | | | | | | They never return anything also than 0, so lets change the function to void instead. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
| * mx35 iomux: correct offsets of IOMUX registersPhilip Paeps2013-04-16-2/+2
| | | | | | | | | | | | | | | | | | | | This makes mxc_iomux_set_input() work correctly. Previously, the incorrect offset of IOMUXSW_INPUT_CTL caused mxc_iomux_set_input() to write to the wrong register, possibly resulting in unexpected behaviour. Signed-off-by: Philip Paeps <philip@paeps.cx> Acked-by: Stefano Babic <sbabic@denx.de>
* | exynos: Correct use of 64-bit divisionSimon Glass2013-04-17-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | The current code is causing errors like this on my toolchains: /usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/ ld.bfd.real: failed to merge target specific data of file /usr/lib/gcc/ armv7a-cros-linux-gnueabi/4.7.x-google/libgcc.a(_divdi3.o) Use do_div() to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Tegra: Split tegra_get_chip_type() into soc & sku funcsTom Warren2013-04-15-36/+83
| | | | | | | | | | | | | | | | | | | | | | As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true function, i.e. tegra_get_chip_sku(), which returns an ID like TEGRA_SOC_T25, TEGRA_SOC_T33, etc. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Fix MSELECT clock divisors for T30/T114.Tom Warren2013-04-15-8/+6
| | | | | | | | | | | | | | | | | | A comparison of registers between our internal NV U-Boot and u-boot-tegra/next showed some discrepancies in the MSELECT clock divisor programming. T20 doesn't have a MSELECT clk src reg. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
generated by cgit v1.1 at 2024-12-25 07:46:26 +0000