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* MX35: make use of GPIO framework for MX35 processorStefano Babic2011-09-04-0/+40
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX5: make use of GPIO framework for MX5 processorStefano Babic2011-09-04-7/+35
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: make use of GPIO framework for MX31 processorStefano Babic2011-09-04-7/+35
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX25: make use of GPIO framework for MX25 processorStefano Babic2011-09-04-12/+45
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX: MX35 / MX5: uniform clock command with powerpcStefano Babic2011-09-04-4/+4
| | | | | | | | | | | There was already a command to show the processor clocks for PowerPC (clocks). For i.MX, the "clockinfo" command was introduce. The patch sets the same command name used on PowerPC. A nasty and not needed newline is also dropped in the help for the command. Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: MX51: PLL errata workaroundDavid Jander2011-09-04-0/+43
| | | | | | | | | | | | | This is a port of the official PLL errata workaround from Freescale to mainline u-boot. The PLL's in the i.MX51 processor can go out of lock due to a metastable condition in an analog flip-flop when used at high frequencies. This workaround implements an undocumented feature in the PLL (dither mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. Signed-off-by: David Jander <david@protonic.nl>
* omap4: fix build warning due to signed unsigned comparisonAneesh V2011-09-04-6/+6
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: fix gpio related build breaksAneesh V2011-09-04-19/+103
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* gpio:samsung s5p_ suffix add for GPIO functionsŁukasz Majewski2011-09-03-16/+16
| | | | | | | | | | | | | | This change is driven by need of general gpio_* functions, which as their parameter are accepting the GPIO pin number, NOT block and pin. This makes the code alike to omap, and allows for using more generic frameworks (e.g. software I2C). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arm: fix bd pointer dereference prior initializationIgor Grinberg2011-09-03-4/+5
| | | | | | | gd->bd pointer has been used prior been initialized. Move the relevant code after the initialization. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* arm, lib/board.c: use gd->ram_size instead of bd->bi_memsizeHeiko Schocher2011-09-03-1/+1
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> cc: Albert Aribaud <albert.u.boot@aribaud.net>
* MX31: removed warnings due to clock.hStefano Babic2011-09-03-1/+1
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* integrator: convert to new build systemLinus Walleij2011-09-03-5/+0
| | | | | | | | | | | | | | | | | This deletes the integrator split_by_variant.sh script and defines a number of unique board types for the core modules that are meaningful to support for the Integrator AP/CP, i.e. the ones that did not just say "unsupported core module" in split_by_variant.sh. If more core modules need to be supported they are easy to add. We delete all the old cruft in Makefile and MAKEALL that was working around the old way of building boards. We create a unique config file per board to satisfy the build system, but they are just oneliners that include the existing integratorap.h and integratorcp.h configs. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* arm: lib: memcpy: Do not copy to same addressMatthias Weisser2011-09-03-0/+3
| | | | | | | | In some cases (e.g. bootm with a elf payload which is already at the right position) there is a in place copy of data to the same address. Catching this saves some ms while booting. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* AT91: fix at91sam9g45.h to include USB Host definesReinhard Meyer2011-09-03-1/+3
| | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* atmel: update at91sam9m10g45 SoC support to new styleThomas Petazzoni2011-09-03-185/+135
| | | | | | Based on earlier work by Alex Waterman <awaterman@dawning.com>. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* Convert ISO-8859 files to UTF-8Albert ARIBAUD2011-08-04-34/+34
| | | | | | | | There was a mix of UTF-8 and ISO-8859 files in the U-Boot source tree, which could cause issues with the patchwork review system. This commit converts all ISO-8859 files to UTF-8. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* drivers/rtc: add Marvell Integrated RTCJason Cooper2011-08-04-0/+1
| | | | | | | This driver can be used for kirkwood SoCs by enabling CONFIG_RTC_MV. Tested on Global Scale Technologies Dreamplug. Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
* Armada100: MFP macro naming correctionAjay Bhargav2011-08-04-2/+2
| | | | | | MFP macros for UART3 updated. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* arm: auto gen asm-offsets.h for mb86r0xMatthias Weisser2011-08-04-74/+109
| | | | | | auto gen asm-offsets.h for mb86r0x Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* cosmetic: arm: lib/board.c: Coding Style cleanupHeiko Schocher2011-08-04-105/+111
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> cc: Albert Aribaud <albert.u.boot@aribaud.net> cc: <macpaul@gmail.com> cc: Wolfgang Denk <wd@denx.de>
* AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/masterXu, Hong2011-08-03-118/+83
| | | | | | | | Rework for AT91SAM9263 SoC, makes it build again. Based on the work for AT91SAM9260-EK. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
* AT91: SoC fix at91sam9261_matrix.hXu, Hong2011-08-03-41/+36
| | | | | | Fix at91sam9261_matrix.h according to the new scheme. Signed-off-by: Hong Xu <hong.xu@atmel.com>
* AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/masterXu, Hong2011-08-03-209/+171
| | | | | | | | | Rework for AT91SAM9RL SoC, makes it build again. Based on the work for AT91SAM9260-EK. V4: US->USART, cosmetics Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* AT91: change common at91sam9261 files to compile with new schemeAsen Dimov2011-08-03-41/+38
| | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)Reinhard Meyer2011-08-03-1/+1
| | | | | | | Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USARTAndreas Bießmann2011-08-03-4/+0
| | | | | | | | The CONFIG_AT91RM9200_USART is an remnant of 18ed5e9550810e2fc5bf2c757aee47774609651c which deleted the at91rm9200_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warningAndreas Bießmann2011-08-03-4/+0
| | | | | | | The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of at91rm9200 arch code in arm920t. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: remove obsolete at91rm9200Andreas Bießmann2011-08-03-2936/+0
| | | | | | | | The big "ARM: remove broken boards" series deletes all boards using obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove this code now. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* omap4: clock init support for omap4460Aneesh V2011-08-03-8/+65
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: support TPS programmingAneesh V2011-08-03-7/+79
| | | | | | | | | | | TPS62361 is the new power supply used in OMAP4460 that supplies vdd_mpu. VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies vdd_iva. VCORE3 is not used in OMAP4460. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: reuse omap3 gpio support in omap4Aneesh V2011-08-03-51/+105
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: sdram init changes for omap4460Aneesh V2011-08-03-19/+30
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add omap4460 revision detectionAneesh V2011-08-03-0/+5
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* mkimage: Add OMAP boot image supportJohn Rigby2011-08-03-0/+30
| | | | | | | | | | - Add mkimage support for OMAP boot image - Add support for OMAP boot image(MLO) generation in the new SPL framework Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: add MMC and FAT support to SPLAneesh V2011-08-03-2/+277
| | | | | | | | | | | | | | - Add MMC raw and FAT mode boot support for OMAP - Provide a means by which parameters passed by ROM-code can be saved in u-boot. - Save boot mode related information passed by OMAP4 ROM-code and use it to determine where to load the u-boot from - Assumes that the image has a mkimage header. Gets the payload size and load address from this header. If the header is not detected assume u-boot.bin as payload Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: add basic SPL supportAneesh V2011-08-03-2/+201
| | | | | | | | | | | | | - Provide alternate implementations of board_init_f() board_init_r() for OMAP spl. - Provide linker script - Initialize global data - Add serial console support - Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move it to board config header from config.mk Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* armv7: start.S: fixes and enhancements for SPLAneesh V2011-08-03-12/+39
| | | | | | | | | | | - Allow SPL to have .bss disjoint from rest of the image - Allow for .bss setup in CONFIG_SPL_BUILD case too. - Take care of the special case where relocation offset = 0. - Compile out exception handling code and install a simpler vector Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: automatic sdram detectionAneesh V2011-08-03-0/+238
| | | | | | | | | | | | | | | | | | | | | | | | | Identify SDRAM devices connected to EMIF automatically: LPDDR2 devices have some Mode Registers that provide details about the device such as the type, density, bus width etc. EMIF has the capability to read these registers. If there are no devices connected to a given chip-select reading mode registers will return junk values. After reading as many such registers as possible and matching with expected ranges of values the driver can identify if there is a device connected to the respective CS. If we identify that a device is connected the values read give us complete details about the device. This along with the base AC timings specified by JESD209-2 allows us to do a complete automatic initialization of SDRAM that works on all boards. Please note that the default AC timings specified by JESD209-2 will be safe for all devices but not necessarily optimal. However, for the Elpida devices used on Panda and SDP the default timings are both safe and optimal. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: calculate EMIF register valuesAneesh V2011-08-03-10/+967
| | | | | | | | | | | | | | Calculate EMIF register values based on AC timing parameters from the SDRAM datasheet and the DDR frequency rather than using the hard-coded values. For a new board the user doen't have to go through the tedious process of calculating the register values. Instead, just provide the AC timings from the device data sheet as input and the driver will automatically calculate the register values. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add sdram init supportAneesh V2011-08-03-7/+1500
| | | | | | | Add support for the SDRAM controller (EMIF). Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add clock supportAneesh V2011-08-03-0/+1486
| | | | | | | | | | | | | | Add support for: 1. DPLL locking 2. Initialization of clock domains and clock modules 3. Setting up the right voltage on voltage rails This work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add OMAP4430 revision checkAneesh V2011-08-03-8/+97
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: cleanup pin mux dataAneesh V2011-08-03-4/+129
| | | | | | | | | | | | | - separate mux settings into essential and non essential parts - essential part is board independent as of now(so move it to SoC directory). Will help in having single SPL for all boards. - Non-essential part(the pins not essential for u-boot to function) need to be phased out eventually. - Correct mux data by aligning to the latest settings in x-loader Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: utility function to identify the context of hw initAneesh V2011-08-03-1/+82
| | | | | | | | | | | | | | | | The basic hardware init of OMAP4(s_init()) can happen in 4 different contexts: 1. SPL running from SRAM 2. U-Boot running from FLASH 3. Non-XIP U-Boot loaded to SDRAM by SPL 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the Configuration Header feature What level of hw initialization gets done depends on this context. Add a utility function to find this context. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: fix LPSC constantsLaurence Withers2011-08-03-12/+31
| | | | | | | | | | Some of the LPSC constants were incorrect, and some were missing. This commit fixes the incorrect constants (which were not used anywhere in the tree) and adds all constants for both DA830 and DA850, as per the TI datasheets. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: switch an enum to defines for consistencyLaurence Withers2011-08-03-41/+40
| | | | | | | | | | There are two main sets of LPSC constants, depending on the processor family. The DA8xx constants were given in an enum whereas the non-DA8xx constants were preprocessor defines. This commit switches the DA8xx constants to defines for consistency. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: add MMC/SD controller addressesLaurence Withers2011-08-03-0/+2
| | | | | Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci EMAC: declare function for all DA8xx CPUsLaurence Withers2011-08-03-1/+1
| | | | | | | | | | | | The function davinci_emac_mii_mode_sel() is defined in board/davinci/common/misc.c for any DA8xx CPU which has CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board. This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC is enabled. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: add generic GPIO driverLaurence Withers2011-08-03-0/+8
| | | | | | | | | | | Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface specified in <asm/gpio.h> . The driver has support for both manipulating GPIO pins as well as automatically configuring the pin multiplexor registers to set the pin function to GPIO. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>