| Commit message (Collapse) | Author | Age | Lines |
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The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 5aa5974f487e0b4c2e963a86203161c5f05e2fdf)
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Since the SD3.0 kernel driver needs M4 image support, this causes problem to mfgtool.
To decouple the relationship, we modify the FDT file in u-boot to disable
SD3.0 when booting for mfgtool. So the kernel won't depend on M4 image.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 1826d6e4dc732521190c742f812193be95eea211)
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Add common plugin codes to call ROM's hwcnfg_setup and generate IVT2
header.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 58ffe85c25ff554c185d8f6fd8b6443f167227da)
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The single boot mode in MX7ULP will only boot up A7, the M4 is running in ROM
by checking entry from SIM0 GP register.
In this patch, We bind M4 image with u-boot.bin by allocating a section for m4 image.
So the whole image (included M4 image) will be loaded by A7 ROM into DDR. Then
when u-boot is up, it will try to load M4 image into TCML and boot it there.
Since M4 image will not be relocated in u-boot codes, we must load it during
board_f. Current implementation put it in arch_cpu_init to get M4 booted
as quick as possible.
We requires the M4 image with IVT head and padding embedded, not a RAW binary. The
image should be same as what is used for M4 QSPI boot in dual boot mode.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 04163dbd4f6190f310fff17b53b4bc7b8370ba89)
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Add EVK board support.
Add the evk dts file.
LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)
CPU: Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM: 1 GiB
MMC: FSL_SDHC: 0
In: serial@402D0000
Out: serial@402D0000
Err: serial@402D0000
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Add i.MX7ULP dtsi file.
Add clock and pinfun header files.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
size for HAB support boot on mx7ulp.
Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
secure uboot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
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Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>
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Add lpi2c driver for i.MX7ULP.
Need to enable the two options to use this driver:
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins
to add IOMUX_CONFIG_MPORTS flags.
Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not
aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address
to aligin with it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Update the mxc_ocotp driver to support i.MX7ULP.
The read/write sequence has some changes due to
PDN and OUT_STATUS registers added and TIME register is
removed. Also update the bank size and number.
Add is_mx7ulp macro in sys_proto.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
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Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.
The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.
To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
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Implement the i2c clock enable and get function for mx7ulp. These
functions are required by imx_lpi2c driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
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Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
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Add imx-regs.h for i.MX7ULP registers addresses definitions and some
registers structures.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
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i.MX7ULP is a new series SoC which has different architecture
from previous i.MX platforms. Create a new cpu folder for it,
and add it to Kconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
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Add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 board supports.
Enable the OF_CONTROL and convert them to use DM driver. Since the DTB lacks
the support for some modules. We have to use QSPI and FEC with non-DM driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add 12x12 ddr3 arm2 board support and convert it to use OF_CONTROL and
DM drivers.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add mx7d 12x12 lpddr3 arm2 support, which has enabled the OF_CONTROL
and DM drivers
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add nand/qspi build configurations for their boot support.
Also Add gpmi-nand and qspi specified DTS files for enable them.
For QSPI, this patch changes it to use DM driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add epdc support from v2016.03.
Add a epdc specified DTS file for using epdc
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Enable dtb support for mx7dsabresd board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Introduce dts files for i.MX 7D SabreSD platform.
From imx_4.1.y, based on "commit b423f954fb755"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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This EPDC/EPXP QoS setting is needed for EPDC stress test to pass.
Signed-off-by: Robby Cai <r63905@freescale.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 1b32518d1c27f05eb84a4cb93594710354b2e343)
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Modify the mx6qarm2 configurations to enable OF_CONTROL and DM drivers:
USB, Ethernet, UART and MMC.
Add two DTS files for imx6q/dl arm2 board and imx6q pop arm2 board.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Copy the DTS files from kernel for 14x14/17x17/19x19 ARM2 board for
preparing enabling the OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Copy the board codes and build configurations for i.MX6SX 14x14/17x17/19x19
ARM2 boards from v2016.03 as the base for converting to OF_CONTROL and
DM driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Copy the DTS files from kernel for LPDDR2/3 ARM2 board for preparing enabling
the OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Copy the DTS files from kernel for DDR3 ARM2 board for preparing enabling
the OF_CONTROL.
Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using
DM SPI driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add the modules disable fuses mapping with FDT nodes and devices name.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit d033825f034467fa9c9aeff6fcf95a146c802cf1)
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add splash screen feature for epdc.
it's tested on imx6ull arm2 board.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit bcdbe240bb2a97d38ba30dd244a51ece87662b06)
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Move the mx6ull ddr3 arm2 board codes and defconfigs from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Copy the DTS files from kernel for DDR3 ARM2 board and LPDDR2 ARM2 board
preparing for enabling OF_CONTROL.
Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using
DM SPI driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Move the mx6ul DDR3/LPDDR2 ARM2 boards codes from v2016.03 u-boot as
the base for OF_CONTROL enabling.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update i.MX6ul dtsi file and add mx6ul 14x14 and 9x9 evk DTS file
to latest in kernel.
To support DM QSPI driver, modify the DTS files with adding a spi0
alias for qspi node and changing the the n25q256a flash node's compatible
to "spi-flash"
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update i.MX6SLL dtsi file and mx6sll-evk DTS file to latest in kernel.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update i.MX6SL dtsi file and dt-binding header files.
Add the imx6sl-evk DTS file preparing for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Copy the imx6sx-sdb latest DTS file from imx_4.1.y kernel.
To support DM QSPI driver, modify the n25q256a flash node's compatible
to "spi-flash".
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update i.MX6SX dtsi file and relevant DTS header files.
Add the imx6sx-sdb DTS files preparing for using DTB.
To support DM QSPI driver
1. Modify the n25q256a flash node's compatible to "spi-flash".
2. Add spi0 and spi1 alias for qspi1 and qspi2.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update mx6qpsabreauto build configurations to use OF_CONTROL and DM driver.
Also add the imx6qpsabreauto DTS file for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update mx6dl/solosabreauto build configurations to use OF_CONTROL and DM driver.
Also add the imx6dlsabreauto DTS file for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Enable OF_CONTROL and DM driver on mx6qsabreauto.
1. Add the imx6qsabreauto relevant DTS file for using DTB.
2. Modify PMIC initialization codes to use DM PMIC driver.
3. Modify to use PCA953X DM driver
4. Remove NAND from default, since the default imx6q-sabreauto.dts disabled
the nand. The pins are conflicted with UART3, while UART3 is enabled.
5. For NAND build configuration, remove the USB, since the imx6q-sabreauto-gpmi-weim.dts
will have pin conflicts on steer logic.
6. GPIO requests added.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Enable OF_CONTROL and DM driver on mx6dlsabresd. And add the imx6dl
sabresd DTS file for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Since we have enabled the i.MX6QP sabresd board with OF_CONTROL and DM
driver. Add the imx6qp DTS file and imx6qp sabresd DTS file for build.
Signed-off-by: Ye Li <ye.li@nxp.com>
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1. Add build configs for i.MX6ULL 9X9 EVK. Enable DM I2C driver and
DM PMIC driver for pfuze3000. Convert power init codes to use
DM PMIC driver.
2. Add lpddr2 script IMX6ULL_9X9_LPDDR2_400MHz_16bit_V1.2.inc for
the 9x9 board.
Refer the commit 44a84b44a84cd1bdcc54d722987e5f109510891b
3. Add DTS file for 9x9 evk board.
Signed-off-by: Ye Li <ye.li@nxp.com>
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To support boot from QSPI/NAND/eMMC, add relevant DTS files and
build configurations.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update mx6ull evk to add features from v2016.03.
1. Add support for NAND flash.
2. Add support for QSPI DM driver.
3. Add USB DM driver support.
4. Add two FEC support by using DM FEC driver
5. Update environments for various boot devices support: SD/NAND/eMMC/QSPI
6. Add MFGtool environments.
7. Add board codes for 9x9 EVK board
For the DTS file, some changes are needed for using QSPI DM driver
1. Add spi0 alias for qspi node. Which is used for bus number 0.
2. Modify the n25q256a@0 compatible property to "spi-flash".
3. Modify spi4 (gpio_spi) node to spi5
Signed-off-by: Ye Li <ye.li@nxp.com>
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