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* socfpga: fix clock manager register definitionPavel Machek2014-08-29-99/+105
* arm: include config.h in arch/arm/lib/vectors.SChristian Riesch2014-08-29-0/+2
* ARM:asm:io.h use static inlineJeroen Hofstee2014-08-29-6/+6
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-08-29-74/+170
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| * ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+3
| * ARM: DRA7: Enable software leveling for dra7Sricharan R2014-08-25-68/+32
| * keystone2: use EFUSE_BOOTROM information to configure PLLsVitaly Andrianov2014-08-25-0/+129
| * board/ti/dra7xx: add support for parallel NORpekon gupta2014-08-25-6/+6
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-08-29-20/+5
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| * | ARM: zynq: Remove spl.hMichal Simek2014-08-19-18/+2
| * | ARM: zynq: Move ps7_init() out of spl.hMichal Simek2014-08-19-2/+2
| * | zynq: spl: Add vectors section to linker scriptPeter Crosthwaite2014-08-08-0/+1
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2014-08-29-1/+217
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| * | | ARM: tegra: add Colibri T30 board supportStefan Agner2014-08-18-0/+103
| * | | ARM: tegra: Use mem size from MC rather than ODMDATAStephen Warren2014-08-18-1/+17
| * | | ARM: tegra: Disable VPRBryan Wu2014-08-18-0/+97
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* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-26/+2265
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| * | | mx6sxsabresd: Add Ethernet supportFabio Estevam2014-08-20-0/+11
| * | | mx6sx: Adjust enable_fec_anatop_clock() for mx6soloxFabio Estevam2014-08-20-0/+21
| * | | mx6sxsabresd: Convert to the new Kconfig styleFabio Estevam2014-08-20-0/+4
| * | | ARM: mx6: Handle the MMDCx_MDCTL COL field capricesMarek Vasut2014-08-20-1/+7
| * | | ARM: mx6: Prevent overflow in DRAM size detectionMarek Vasut2014-08-20-0/+5
| * | | ARM: mx5: Fix CHSCCDR nameMarek Vasut2014-08-20-1/+1
| * | | mx6: add support of multi-processor commandGabriel Huau2014-08-20-0/+108
| * | | Update aristainetos board to KconfigStefano Babic2014-08-13-0/+4
| * | | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-16/+1233
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| * | | mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADEDFabio Estevam2014-08-08-1/+1
| * | | mx6: crm_regs: Fix MXC_CCM_CLPCR_WB_PER_AT_LPM definitionFabio Estevam2014-08-08-1/+1
| * | | mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offsetFabio Estevam2014-08-08-2/+2
| * | | mx6: imx-regs: Remove unused 'omux' field from iomux structFabio Estevam2014-08-08-2/+0
| * | | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-08-692/+3167
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| * | | | i.MX6: add enable_spi_clk()Heiko Schocher2014-07-23-0/+20
| * | | | i.MX6: define struct pwm_regs and PWMCR_* definesHeiko Schocher2014-07-23-0/+16
| * | | | imx6: add gpr2 usb_otg_id iomux select control defineHeiko Schocher2014-07-23-0/+2
| * | | | mx6: Adjust the GPR offset for mx6soloxFabio Estevam2014-07-23-0/+3
| * | | | mx6: Remove duplication of iomuxc structureFabio Estevam2014-07-23-11/+1
| * | | | mx6: soc: Do not apply the PFD erratum for mx6soloxFabio Estevam2014-07-23-0/+4
| * | | | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2014-07-16-786/+4438
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| * | | | | mx6: clock: Do not enable sata and ipu clocksFabio Estevam2014-07-10-0/+8
| * | | | | mx6sx: Add pin definitionsFabio Estevam2014-07-10-0/+1677
| * | | | | mx6: Add support for the mx6solox variantFabio Estevam2014-07-10-7/+369
* | | | | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2014-08-29-284/+351
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| * | | | | | sunxi: dram: Autodetect DDR3 bus width and densitySiarhei Siamashka2014-08-12-5/+47
| * | | | | | sunxi: dram: Derive write recovery delay from DRAM clock speedSiarhei Siamashka2014-08-12-1/+16
| * | | | | | sunxi: dram: Drop DDR2 support and assume only single rank DDR3 memorySiarhei Siamashka2014-08-12-22/+19
| * | | | | | sunxi: dram: Configurable DQS gating window mode and delaySiarhei Siamashka2014-08-12-1/+56
| * | | | | | sunxi: dram: Add a helper function 'mctl_get_number_of_lanes'Siarhei Siamashka2014-08-12-14/+16
| * | | | | | sunxi: dram: Improve DQS gate data training error handlingSiarhei Siamashka2014-08-12-3/+3
| * | | | | | sunxi: dram: Use divisor P=1 for PLL5Siarhei Siamashka2014-08-12-17/+11
| * | | | | | sunxi: dram: Configurable MBUS clock speed (use PLL5 or PLL6)Siarhei Siamashka2014-08-12-14/+39
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