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* arm: exynos: realign the code to allow support for newer 64-bit platformsThomas Abraham2016-05-25-6/+40
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-05-24-20/+94
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| * driver/ddr/fsl: Add workaround for erratum A-010165Shengzhou Liu2016-05-18-0/+1
| * arch/arm, arch/powerpc: add # of SEC engines on the SOCAlex Porosanu2016-05-18-0/+3
| * arch/arm: add SEC JR0 offsetAlex Porosanu2016-05-18-10/+28
| * armv7: ls102xa: spl: fix the macro name of MMC modeQianyu Gong2016-05-18-1/+1
| * armv8: fsl-layerscape: spl: fix the macro name of MMC modeQianyu Gong2016-05-18-1/+1
| * armv8: fsl-layerscape: spl: remove duplicate init_early_memctl_regs()Qianyu Gong2016-05-18-3/+0
| * armv8: fsl-layerscape: Remove unnecessary flushing dcacheAlison Wang2016-05-18-3/+0
| * armv8/ls1043a: update the node for QSPI supportYuan Yao2016-05-18-2/+3
| * armv8/fdt: add fixup_crypto_nodeAlex Porosanu2016-05-17-0/+19
| * driver/ddr/fsl: Add workaround for erratum A-009801Shengzhou Liu2016-05-17-0/+1
| * armv8/ls1043: Add workaround for DDR erratum A-008850Shengzhou Liu2016-05-17-0/+37
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-05-24-1/+15
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| * | arm: dts: dra7: fix ethernet name with proper device addressMugunthan V N2016-05-24-1/+1
| * | arm: dts: dra7: add syscon node to cpsw to read mac addressMugunthan V N2016-05-24-0/+1
| * | arm: dts: am4372: add syscon node to cpsw to read mac addressMugunthan V N2016-05-24-0/+1
| * | ARM: omap5: add platform specific ethernet phy modes configurationsMugunthan V N2016-05-24-0/+12
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-05-24-45/+150
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| * | | ARM: zynq: Simplify zynq configurationMichal Simek2016-05-24-42/+6
| * | | ARM64: zynqmp: Add SPL support supportMichal Simek2016-05-24-0/+111
| * | | ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSIMichal Simek2016-05-24-0/+5
| * | | ARM64: zynqmp: Align gic ranges for 64k in device treeAlexander Graf2016-05-24-2/+2
| * | | ARM: zynq: Call ps7_post_config() for SPLMichal Simek2016-05-24-0/+15
| * | | ARM: zynq: Add support for SPL_LOAD_FITMichal Simek2016-05-24-0/+10
| * | | ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-busMasahiro Yamada2016-05-24-1/+1
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* | | ARM: sama5d2: Implement boot device autodetectionMarek Vasut2016-05-24-1/+67
* | | ARM: at91: clock: complete the GCK's clock sourcesWenyou Yang2016-05-24-0/+8
* | | ARM: at91: clock: fix the GCK's clock sourceWenyou Yang2016-05-24-0/+5
* | | board: atmel: add SAMA5D2 PTC Engineering boardWenyou Yang2016-05-24-0/+6
* | | ARM: at91: sama5d2: add macro & field definitionsWenyou Yang2016-05-24-0/+29
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* | ARM: fix ifdef in ARMv8 lowlevel_init() againMasahiro Yamada2016-05-23-1/+1
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-05-17-10/+6
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| * | dm: scsi: Rename CONFIG_CMD_SCSI to CONFIG_SCSISimon Glass2016-05-17-1/+1
| * | dm: spi: soft_spi: switch to use linux compatible stringPeng Fan2016-05-17-5/+5
| * | video: tegra: refuse to bind to disabled dcsStephen Warren2016-05-17-4/+0
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* | imx: imx-common: print i.MX 7 SoC names consistentlyStefan Agner2016-05-17-1/+1
* | imx: imx7d: fix ahb clock mux 1Stefan Agner2016-05-17-1/+1
* | imx: iomux-v3: fix UART input selectsStefan Agner2016-05-17-4/+4
* | imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5Eric Nelson2016-05-17-0/+1
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* arm/arm64: Move barrier instructions into separate headerAndre Przywara2016-05-12-21/+46
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-05-06-1/+2
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| * socfpga: fix broken build if CONFIG_ETH_DESIGNWARE disabledAnatolij Gustschin2016-05-06-1/+1
| * ARM: socfpga: Disable USB OC protection on SoCratesMarek Vasut2016-05-06-0/+1
* | imx6: cache: disable L2 before touching Auxiliary Control RegisterPeng Fan2016-05-06-3/+6
* | ARM: am33xx: Fix DDR initialization delaysRuss Dill2016-05-06-0/+1
* | ARM: fix ifdefs in ARMv8 lowlevel_init()Stephen Warren2016-05-06-0/+2
* | Fix various typos, scattered over the code.Robert P. J. Day2016-05-05-2/+2
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* ARM: tegra: enable GPU node by compatible valueStephen Warren2016-05-04-15/+22
* Change my mailaddressAndreas Bießmann2016-05-02-3/+3
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