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* Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2013-02-23-1405/+8440
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| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-21-0/+8
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| | * am33xx: support for booting via usbethIlya Yanok2013-02-18-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds BOOT_DEVICE define for USB booting and fixes spl_board_init function to call arch_misc_init (this is the place there musb is initialized). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| | * da8xx: Add the missing pinmux for da830 to the gpio driverTomas Novotny2013-02-18-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of kernel version 3.7.5. If the driver is used for the da850, then SoC variant must be specified by CONFIG_SOC_DA850. Signed-off-by: Tomas Novotny <tomas@novotny.cz> Cc: Tom Rini <trini@ti.com>
| * | Merge 'u-boot-microblaze/mainline/arm' into 'u-boot-arm/master'Albert ARIBAUD2013-02-21-1/+206
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | This pulls the three following ZYNQ commits into ARM master: 7dca54f8: xilinx: zynq: Enable DCC and create new zynq_dcc board 59c651f4: arm: zynq: Add SLCR support with system reset 00ed3458: arm: zynq: Add lowlevel initialization to C
| | * arm: zynq: Add lowlevel initialization to CMichal Simek2013-02-07-2/+70
| | | | | | | | | | | | | | | | | | | | | Do lowlevel initialization directly in C. Zynq do not require to do it in asm. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * arm: zynq: Add SLCR support with system resetMichal Simek2013-02-07-0/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch provides slcr base address initialization support and a support to reset the cpu through slcr driver, hence removed the reset_cpu() from board.c. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-1219/+9426
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| | * | arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the READMELucas Stach2013-02-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No one expects to end up in a delayed environment if CONFIG_DELAY_ENVIRONMENT isn't defined. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com>
| | * | Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra114: Add common CPU (shared) filesTom Warren2013-02-11-4/+1291
| | | | | | | | | | | | | | | | | | | | | | | | These files are used by both SPL and main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra114: Add CPU (armv7) filesTom Warren2013-02-11-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These files are for code that runs on the CPU (A15) on T114 boards. At this time, there is no A15-specific code here. As T114-specific run-time code is added, it'll go here. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra114: Add AVP (arm720t) filesTom Warren2013-02-11-38/+403
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides SPL support for T114 boards - AVP early init, plus CPU (A15) init/jump to main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra114: Add arch-tegra114 include filesTom Warren2013-02-11-5/+1365
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Common Tegra files are in arch-tegra, shared between T20/T30/T114. Tegra114-specific headers are in arch-tegra114. Note that some of these will be filled in as more T114 support is added (drivers, WB/LP0 support, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | tegra: add SPI SLINK driverAllen Martin2013-02-11-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra: add addresses of SPI SLINK controllersAllen Martin2013-02-11-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add I/O addresses of SPI SLINK controllers 1-6 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra30: add SBC1 to periph id mapping tableAllen Martin2013-02-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SBC1 is SPI controller 1 on tegra30 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra20: fdt: add SPI SFLASH nodeAllen Martin2013-02-11-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra: rename FUNCMUX_UART2_UARTBStephen Warren2013-02-11-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FUNCMUX_ defines should be named after the pin groups they affect, not after the module they're muxing onto those pin groups. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.cTom Warren2013-02-11-1188/+768
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This 'commonizes' much of the clock/pll code. SoC-dependent code and tables are left in arch/cpu/tegraXXX-common/clock.c Some T30 tables needed whitespace fixes due to checkpatch complaints. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entryTom Warren2013-02-11-8/+0
| | | | | | | | | | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
| | * | pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel2013-02-07-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
| | * | am33xx: add a pulldown macro to pinmux configLars Poeschel2013-02-07-1/+2
| | | | | | | | | | | | | | | | Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
| | * | ARM: add wfi assembly macroRob Herring2013-02-03-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since wfi instruction is only available on ARMv7, add a conditional macro for it. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| | * | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-70/+1435
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| | * | | tegra: fdt: add apbdma nodeAllen Martin2013-01-17-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add apbdma node for tegra20 and tegra30, copied directly from tegra Linux dtsi files. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | tegra: fdt: sort dts filesAllen Martin2013-01-17-189/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | tegra: fdt: remove clocks nodesAllen Martin2013-01-17-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These nodes are unused. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | tegra: remove IRDA pinmux synonymAllen Martin2013-01-16-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this synonym and replace with UARTB to disambiguate. Signed-off-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | Tegra30: fdt: Update DT files with I2C info for T30/CardhuTom Warren2013-01-16-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note that T30 does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but DVC_I2C is still used to designate the controller intended for power control (PWR_I2C in the schematics). On Cardhu, it's used to access the PMU and EEPROM, as well as the audio codec, temp sensor, and fuel gauge devices from the OS. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | Tegra30: clocks: Fix clock tables for I2C and other periphsTom Warren2013-01-16-34/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 16-bit divider support (I2C) to periph table, annotate and correct some entries, and fix clk_id lookup function. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | Tegra30: Add generic Tegra30 build supportTom Warren2013-01-16-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | | Tegra30: Cardhu: Add DT filesTom Warren2013-01-16-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | | Tegra30: Add common CPU (shared) filesTom Warren2013-01-16-56/+1768
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These files are used by both SPL and main U-Boot. Also made minor changes to shared Tegra code to support T30 differences. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * | | Tegra30: Add CPU (armv7) filesTom Warren2013-01-16-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These files are for code that runs on the CPU (A9) on T30 boards. At this time, there are no T30-specific ARMV7 files. As T30-specific run-time code is added, it'll go here. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidai.com>
| | * | | Tegra30: Add AVP (arm720t) filesTom Warren2013-01-16-247/+612
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides SPL support for T30 boards - AVP early init, plus CPU (A9) init/jump to main U-Boot. Some changes were made to Tegra20 cpu.c to move common routines into tegra-common/cpu.c and reduce code duplication. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| | * | | Tegra30: Add arch-tegra30 include filesTom Warren2013-01-16-48/+1775
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Common Tegra files are in arch-tegra, shared between T20 and T30. Tegra30-specific headers are in arch-tegra30. Note that some of these will be filled in as more T30 support is added (drivers, WB/LP0 support, etc.). A couple of Tegra20 files were changed to support common headers in arch-tegra, also. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| | * | | tegra: display: add board pinmuxMarc Dietrich2013-01-16-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boards may require a different pinmux setup for DISPALY than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | treewide: include libfdt_env.h before fdt.hKim Phillips2013-02-07-1/+0
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and, if including libfdt.h which includes libfdt_env.h in the correct order, don't include fdt.h before libfdt.h. this is needed to get the fdt type definitions set from the project environment before fdt.h uses them. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Jerry Van Baren <gvb.uboot@gmail.com>
| * | | arm: Use generic global_dataSimon Glass2013-02-04-37/+1
| | | | | | | | | | | | | | | | Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | ppc: arm: Move sdhc_clk into arch_global_dataSimon Glass2013-02-04-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | arm: Move tlb_addr and tlb_size to arch_global_dataSimon Glass2013-02-01-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move these fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Address tlb_size in this patch as well] Signed-off-by: Tom Rini <trini@ti.com>
| * | | ixp: Move timestamp to arch_global_dataSimon Glass2013-02-01-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | arm: Move timer_reset_value to arch_global_dataSimon Glass2013-02-01-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | arm: Move lastinc to arch_global_dataSimon Glass2013-02-01-66/+68
| | | | | | | | | | | | | | | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | arm: Move tbl to arch_global_dataSimon Glass2013-02-01-83/+89
| | | | | | | | | | | | | | | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | arm: Move tbu to arch_global_dataSimon Glass2013-02-01-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | arm: Move timer_rate_hz into arch_global_dataSimon Glass2013-02-01-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-10 02:41:20 +0000