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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-12-10-15/+28
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| * arm: vf610: improve evaluation of reset sourceStefan Agner2014-12-01-10/+19
| | | | | | | | | | | | | | Improve the evaluation of the reset source. Bit description according to latest reference manual rev. 7. Signed-off-by: Stefan Agner <stefan@agner.ch>
| * arm: mx6: Change defines ENET_xxMHz to ENET_xxMHZ (no CamelCase)Stefan Roese2014-12-01-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | As checkpatch complaines about these camel-case defines, lets change them to only use upper-case characters. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * sata: fix reset_sata for dwc_ahsataSoeren Moch2014-12-01-0/+3
| | | | | | | | | | | | | | | | | | | | | | - fix crash when sata device is not initialized - remove disable_sata_clock() since it is not clear which clock for which device should be disabled here - call disable_sata_clock() for mx6 in preboot_os instead Signed-off-by: Soeren Moch <smoch@web.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
| * tbs2910: fix KconfigSoeren Moch2014-12-01-0/+1
| | | | | | | | | | | | fix Kconfig for tbs2910 board to prevent crash on relocation Signed-off-by: Soeren Moch <smoch@web.de>
* | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2014-12-10-0/+215
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| * | arm: rmobile: Add mmc.h for sh_mmcif of rmobileNobuhiro Iwamatsu2014-12-10-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | R-Mobile and R-Car ARM SoCs use sh_mmcif as MMC host driver. This adds arch-rmobile/mmc.h that defines mmcif_mmc_init(). Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: rcar: Add structure for infomation of module control registerNobuhiro Iwamatsu2014-12-05-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The infomation of module control register for R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) are almost the same, they can be combined into one structure. This provides structure that summarizes infomation of module control register and default register values. And this structure is the module control use of the kernel at boot time. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: rcar: Add infomation of bits for module control registerNobuhiro Iwamatsu2014-12-05-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds infomation of bits for module control register. This is used to control modules on ARM R-Car SoCs. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: rcar: Add mstp_setclrbits and mstp_setclrbits_le32Nobuhiro Iwamatsu2014-12-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This addes macro for set and clear bit control for module control register. This is used when user want to disable the function of the devices corresponding to register. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: rcar: Move control macro of mstp to arch-rmobile/rcar-mstp.hNobuhiro Iwamatsu2014-12-05-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | Control macro of mstp is common in R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794). This moves these to arch-rmobile/rcar-mstp.h Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: rcar: Move module control register to header file of SoCNobuhiro Iwamatsu2014-12-05-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | Module control registers of R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) are same address. This moves these to header file of SoC. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | stv0991: enable ethernet supportVikas Manocha2014-12-09-0/+100
| | | | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* | | stv0991: Add basic stv0991 architecture supportVikas Manocha2014-12-09-0/+607
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | stv0991 architecture support added. It contains the support for following blocks - Timer - uart Signed-off-by: Vikas Manocha <vikas.manocha@st.com> [trini: Add arch/arm/cpu/armv7/Makefile hunk] Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-12-08-22/+45
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| * | | arm: am33xx: Handle NAND+I2C boot-device the same way as NANDStefan Roese2014-12-04-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-map NAND&I2C boot-device to the "normal" NAND boot-device. Otherwise the SPL boot IF can't handle this device correctly. Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens Draco leads to this boot-device passed to SPL from the BootROM. With this change, Draco boots just fine into main U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
| * | | beagle_x15: add board support for Beagle x15Felipe Balbi2014-12-04-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BeagleBoard-X15 is the next generation Open Source Hardware BeagleBoard based on TI's AM5728 SoC featuring dual core 1.5GHZ A15 processor. The platform features 2GB DDR3L (w/dual 32bit busses), eSATA, 3 USB3.0 ports, integrated HDMI (1920x108@60), separate LCD port, video In port, 4GB eMMC, uSD, Analog audio in/out, dual 1G Ethernet. For more information, refer to: http://www.elinux.org/Beagleboard:BeagleBoard-X15 Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: omap: add support for am57xx devicesFelipe Balbi2014-12-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | just add a few ifdefs around because this device is very similar to dra7xxx. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: omap_common: expose tps659038 and dra7xx_dpllsFelipe Balbi2014-12-04-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | expose those two definitions so they can be used by another board which we're adding in upcoming patches. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: omap5: sdram: mark emif_get_ext_phy_ctrl_const_regs __weakFelipe Balbi2014-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this will allow for boards to overwrite those in case memory setup is different. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: omap5: make hw_init_data weakFelipe Balbi2014-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this way we can let boards overwrite based on what they need. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: omap-common: emif: allow to map memory without interleavingFelipe Balbi2014-12-04-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we want to have two sections, one on each EMIF, without interleaving, current code wouldn't enable emif2. Fix that problem. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: dra7xx: prcm: add missing registersFelipe Balbi2014-12-04-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | some boards might want to use USB1 for host, without fiddling those registers it'll be impossible. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | arm: omap5: tps659038: rename regulator definesFelipe Balbi2014-12-04-10/+10
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Those regulators don't have any coupling with what they supply, so remove the suffixes in order to not confuse anybody. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2014-12-08-107/+558
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| * | | ARM: UniPhier: detect the number of flash banks at run-timeMasahiro Yamada2014-12-09-40/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some UniPhier boards are equipped with an expansion slot that some optional SRAM/NOR-flash cards can be attached to. So, run-time detection of the number of flash banks would be more user-friendly. Until this commit, UniPhier boards have achieved this by (ab)using board_flash_wp_on() because the boot failed if flash_size got zero. Fortunately, this problem was solved by commit 70879a92561a (flash: do not fail even if flash_size is zero). Now it is possible to throw away such a tricky workaround. This commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further refactoring. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: extend register area of init page table for PH1-sLD3Masahiro Yamada2014-12-09-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only) 0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: add device tree sources for PH1-sLD3Masahiro Yamada2014-12-09-0/+186
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: add more device nodes to device treeMasahiro Yamada2014-12-09-15/+220
| | | | | | | | | | | | | | | | | | | | | | | | Add I2C controller and NAND controller devices. Fix indentation too. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: merge UniPhier config headers into a single fileMasahiro Yamada2014-12-08-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some configurations have been moved to Kconfig and the difference among the config headers of UniPhier SoC variants is getting smaller and smaller. Now is a good time to merge them into a single file. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: move support card select to KconfigMasahiro Yamada2014-12-08-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two kinds of expansion boards which are often used for the UniPhier platform and they are only exclusively selectable. It can be better described by the "choice" menu of Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: move CONFIG_UNIPHIER_SMP to KconfigMasahiro Yamada2014-12-08-0/+4
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: use boot_is_swapped() macro for readabilityMasahiro Yamada2014-12-08-10/+10
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: remove Denali NAND controller fixup codeMasahiro Yamada2014-12-07-38/+0
| |/ / | | | | | | | | | | | | | | | | | | This ugly work-around code is unnecessary since commit f09eb52b3ffc (mtd: denali: set some registers after nand_scan_ident()). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | Kbuild: introduce Makefile in arch/$ARCH/Daniel Schwierzeck2014-12-08-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a Makefile under arch/$ARCH/ and include it in the top Makefile (similar to Linux kernel). This allows further refactoringi like moving architecture-specific code out of global makefiles, deprecating config variables (CPU, CPUDIR, SOC) or deprecating arch/$ARCH/config.mk. In contrary to Linux kernel, U-Boot defines the ARCH variable by Kconfig, thus the arch Makefile can only included conditionally after the top config.mk. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: rpi: rename rpi_b to rpiStephen Warren2014-12-08-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The U-Boot port runs on a variety of RPi models, not just the B. So, rename the port to something slightly more generic. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | ARM: rpi_b: detect board revisionStephen Warren2014-12-08-0/+33
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect the board revision early during boot, and print the decoded model name. Eventually, this information can be used for tasks such as: - Allowing/preventing USB device mode; some models have a USB device on- board so only host mode makes sense. Others connect the SoC directly to the USB connector, so device-mode might make sense. - The on-board USB hub/Ethernet requires different GPIOs to enable it, although luckily the default appears to be fine so far. - The compute module contains an on-board eMMC device, so we could store the environment there. Other models use an SD card and so don't support saving the environment (unless we store it in a file on the FAT boot partition...) Set $fdtfile based on this information. At present, the mainline Linux kernel doesn't contain a separate DTB for most models, but I hope that will change soon. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2014-11-27-6/+374
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| * | ARM: UniPhier: enable Device Tree controlMasahiro Yamada2014-11-28-0/+1
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | usb: UniPhier: support OF configurationMasahiro Yamada2014-11-28-3/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_OF_CONTROL is defined, search device tree nodes that are compatible with "panasonic,uniphier-ehci" and take the base address from their "reg" property. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marek Vasut <marex@denx.de>
| * | serial: UniPhier: support OF configurationMasahiro Yamada2014-11-28-0/+111
| | | | | | | | | | | | | | | | | | | | | This commit implements the ofdata_to_platdata handler for the UniPhier serial driver and adds serial device nodes to the device tree sources. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: add device tree sourcesMasahiro Yamada2014-11-28-0/+181
| | | | | | | | | | | | | | | | | | This commit adds basic device tree sources for UniPhier SoCs/boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROLMasahiro Yamada2014-11-28-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled. It includes <asm/gpio.h> and then <asm/gpio.h> includes <asm/arch/gpio.h>. Consequently, all the SoCs that enable CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they do not support GPIO. In the first place, GPIO has nothing to do with OF_CONTROL. It is wrong that lib/fdtdec.c includes GPIO functions; it should be split into two files, FDT-common things and GPIO things. It is, however, a pretty big work to fix that correctly. This is a compromised commit to add a dummy <asm/arch/gpio.h> to support OF_CONTROL for UniPhier platform. This dummy header will be removed after FDT-GPIO stuff is fixed correctly. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | ARM: UniPhier: do not compile platform data when CONFIG_OF_CONTROL=yMasahiro Yamada2014-11-28-3/+3
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | mtd: nand: s3c: Unify the register definition and namingMarek Vasut2014-11-26-20/+19
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Merge struct s3c2410_nand and struct s3c2440_nand into one unified struct s3c24x0_nand. While at it, fix up and rename the functions to retrieve the NAND base address and fix up the s3c NAND driver to reflect this change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Vladimir Zapolskiy <vz@mleia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2014-11-26-3/+18
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| * | arm: ls102xa: Remove bit reversing for SCFG registersAlison Wang2014-11-24-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SCFG_SCFGREVCR is SCFG bit reverse register. This register must be written with 0xFFFFFFFF before writing to any other SCFG register. Then other SCFG register could be written in big-endian mode. Address: 157_0000h base + 200h offset = 157_0200h Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15|16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 W/R SCFGREV Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0-31 SCFGREV SCFG Bit Reverse Control Filed 32'h 0000_0000 - No bit reverse is applied 32'h FFFF_FFFF - Bit reverse is applied; so 31:0 will be stored/read as 0:31 This patch removes the bit reversing for SCFG registers in u-boot. It will be implemented through PBI commands in RCW .pbi write 0x570200, 0xffffffff .end So other SCFG register could be written in big-endian mode in u-boot or kernel directly. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | arm: ls102xa: Add snoop disable for slave port 0, 1 and 2Jason Jin2014-11-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Disable the snoop for slave interface 0, 1 and 2 to avoid the interleaving on the CCI400 BUS. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers: usb: fsl: Define USB configs for LS102XANikhil Badola2014-11-24-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Define USB configs for LS1021XA such as CONFIG_SYS_FSL_USB1_ADDR, CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | arm: ls102xa: Fixed a register definition errorTang Yuantian2014-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | There are 8 SCFG_SPARECR registers in SCFG memory block, not one. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-08-25 00:15:11 +0000