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* Rename getenv_r() into getenv_f()Wolfgang Denk2010-08-04-1/+1
| | | | | | | | | | | | | | | | | | | While running from flash, i. e. before relocation, we have only a limited C runtime environment without writable data segment. In this phase, some configurations (for example with environment in EEPROM) must not use the normal getenv(), but a special function. This function had been called getenv_r(), with the idea that the "_r" suffix would mean the same as in the _r_eentrant versions of some of the C library functions (for example getdate vs. getdate_r, getgrent vs. getgrent_r, etc.). Unfortunately this was a misleading name, as in U-Boot the "_r" generally means "running from RAM", i. e. _after_ relocation. To avoid confusion, rename into getenv_f() [as "running from flash"] Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-07-15-7/+451
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| * PXA: Add support for LMS285GF05 into pxafbMarek Vasut2010-07-14-0/+34
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * Voipac PXA270 LCD SupportMarek Vasut2010-07-14-0/+33
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * PXA: Add OneNAND booting support to start.SMarek Vasut2010-07-14-5/+43
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * PXA: Add PWM2 and PWM3 regs to pxa-regs.hMarek Vasut2010-07-14-1/+9
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * PXA: Add hardware init helper macrosMarek Vasut2010-07-14-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds macros for the following purposes: - GPIO configuration - SDRAM configuration - Wakeup - Clock configuration - Interrupt controller configuration These macros are intended to replace numerous copies of the same code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * Enable PXAFB for PXA27X and PXA3XXMarek Vasut2010-07-14-1/+8
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* | Merge branch 'master' of ../masterWolfgang Denk2010-07-15-2/+19
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| * mvgbe: add support for orion5x GbE controllerAlbert Aribaud2010-07-12-2/+16
| | | | | | | | | | | | | | | | | | Add definitions and initialization in orion5x for mvgbe. Add orion5x in mvgbe SoC includes. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * mvgbe: support SoCs other than kirkwoodAlbert Aribaud2010-07-12-2/+5
| | | | | | | | | | | | | | | | | | Rename all references to kirkwood in mvgbe symbols throughout the whole codebase. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | ARMV7: Restructure OMAP i2c driver to allow code sharing between OMAP3 and OMAP4Steve Sakoman2010-07-05-145/+78
| | | | | | | | | | | | | | This patch modifies the omap24xx driver so that it will also work with OMAP4. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Restructure OMAP mmc driver to allow code sharing between OMAP3 and OMAP4Steve Sakoman2010-07-05-242/+171
| | | | | | | | | | | | | | | | The architecture independent header is moved to drivers/mmc, and the architecture dependent headers reside in asm/arch-omap3 and asm/arch-omap4 Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Add basic support for TI OMAP4Steve Sakoman2010-07-05-2/+573
| | | | | | | | | | | | | | | | | | This patch adds minimum support for OMAP4. Code which can be shared between OMAP3 and OMAP4 is placed in arch/arm/cpu/armv7/omap-common Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7Steve Sakoman2010-07-05-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9 Cortex A8 and A9 both belong to the armv7 architecture, hence the name change. The two architectures are similar enough that substantial code can be shared. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | OMAP: mmc: add support for second and third mmc channelsSteve Sakoman2010-07-05-3/+12
|/ | | | | | | | | | | | | | This patch adds support for the second and third mmc channels on OMAP3 processors Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV in the board config Tested on Overo Signed-off-by: Steve Sakoman <steve@sakoman.com> Tested-by: Philip Balister <philip@opensdr.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Make sure that argv[] argument pointers are not modified.Wolfgang Denk2010-07-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* USB OHCI support for at91sam9g45 SoCSergey Matyukevich2010-06-30-2/+12
| | | | | | | | | | Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards. Note that according to errata from Atmel, OHCI is not operational on the first revision of at91sam9g45 chip. So this patch enables OHCI support for later revisions. Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
* Merge branch 'next' of git://git.denx.de/u-boot-ti into nextWolfgang Denk2010-06-29-1/+1
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| * DaVinci: EMAC: Get EMAC_MDIO_PHY_NUM from config filesPrakash PM2010-06-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently EMAC_MDIO_PHY_NUM is defined as 1 in emac_defs.h. Because of this, EMAC does not work on EVMs which do not have phy connected at 1. Moving the macro to board config file makes this configurable depending on where the phy is connected on the MDIO bus. This patch fixes the board reset issue observed during network access on DM365EVM. EMAC driver was assuming EMAC_MDIO_PHY_NUM as 1 but it is 0 on DM365EVM. This patch is verified on da830/omap-l137, dm365 and dm644x evms. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | Merge branch 'master' into nextWolfgang Denk2010-06-23-131/+103
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| * Prepare v2010.06-rc3v2010.06-rc3Wolfgang Denk2010-06-23-70/+70
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * ARM: remove unused VIDEOLFB ATAGMinkyu Kang2010-06-23-40/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | ATAG_VIDEOLFB is not used anywhere. The belowing warning is occurred due to this ATAG. [ 0.000000] Ignoring unrecognised tag 0x54410008 This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Martin Krause <Martin.Krause@tqs.de>
| * Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2010-06-22-4/+4
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| | * Fix wrong orion5x MPP and GIPO writel argumentsAlbert Aribaud2010-06-22-4/+4
| | | | | | | | | | | | | | | | | | | | | Orion5x MPP and GPIO setting code had writel arguments the wrong way around. Fixed and tested. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
| * | ARM: fix bug in macro __arch_ioremap.Terry Lv2010-06-22-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Terry Lv <r65388@freescale.com> Fix commit message and code formatting. Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | ARM: Align stack to 8 bytesVitaly Kuzmichev2010-06-22-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM ABI requires that the stack be aligned to 8 bytes as it is noted in Procedure Call Standard for the ARM Architecture: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html Unaligned SP also causes the problem with variable-length arrays allocation when VLA address becomes less than stack pointer during aligning of this address, so the next 'push' in the stack overwrites first 4 bytes of VLA. Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com> Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400) Tested-by: Wolfgang Denk <wd@denx.de>
| * | arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older toolsWolfgang Denk2010-06-18-4/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The push / pop instructions used in this file are available only with more recent tool chains: cache.S: Assembler messages: cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}' Change push/pop into stmfd/ldmfd instructions to support older versions of binutils as well. I verified that the modified source code generates exactly the same binary code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rix <tom@bumblecow.com>
* | Merge branch 'master' into nextWolfgang Denk2010-06-18-191/+3595
|\ \ | |/ | | | | | | | | | | Conflicts: Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Merge branch 'fix' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-06-17-1/+4
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| | * PXA: Align stack to 8 bytesMarek Vasut2010-06-13-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Part of this patch is by: Mikhail Kshevetskiy. Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour is undefined. The issue was observed when working with the NAND code, which was rendered disfunctional. Also, the vsprintf() function had serious problems with printing 64bit wide long longs. After aligning the stack, this wrong behaviour is no longer present. Tested on: Marvell Littleton PXA310 board Toradex Colibri PXA320 board Aeronix Zipit Z2 PXA270 handheld Voipac PXA270 board Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-marvellWolfgang Denk2010-06-17-0/+1175
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| | * | Initial support for Marvell Orion5x SoCAlbert Aribaud2010-06-17-0/+1175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Marvell Orion5x SoC. It has no use alone, and must be followed by a patch to add Orion5x support for serial, then support for the ED Mini V2, an Orion5x-based product from LaCie. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-tiWolfgang Denk2010-06-17-0/+1
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: CONFLICT (rename/add): Rename board/davinci/da830evm/Makefile->board/ti/tnetv107xevm/Makefile in 89b765c7f6ddfde07ba673dd4adbeb5da391a81b. board/ti/tnetv107xevm/Makefile added in HEAD But files were identical, so no problem. Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * | TI: DaVinci: Add board specific code for da850 EVMSudhakar Rajashekhara2010-06-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provides initial support for TI OMAP-L138/DA850 SoC devices on a Logic PD EVM board. Provides: Initial boot and configuration. Support for i2c. UART support (console). Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: Ben Gardiner <bengardiner@nanometrics.ca> Reviewed-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | AM35x: Add support for EMIF4Vaibhav Hiremath2010-06-07-0/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the EMIF4 interface available in the AM35x processors. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | omap3: Consolidate SDRC related operationsVaibhav Hiremath2010-06-07-168/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidated SDRC related functions into one file - sdrc.c And also replaced sdrc_init with generic memory init function (mem_init), this generalization of omap memory setup is necessary to support the new emif4 interface introduced in AM3517. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | omap3: Calculate CS1 size only when SDRC isVaibhav Hiremath2010-06-07-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | initialized for CS1 From: Vaibhav Hiremath <hvaibhav@ti.com> The patch makes sure that size for SDRC CS1 gets calculated only when the CS1 SDRC is initialized. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | ARM1176: TI: TNETV107X soc initial supportCyril Chemparathy2010-06-07-0/+1872
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a bunch on on-chip integrated peripherals. This is an initial commit with basic functionality, more commits with drivers, etc. to follow. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | ARM1176: Coexist with other ARM1176 platformsCyril Chemparathy2010-06-07-21/+47
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current ARM1176 CPU specific code is too specific to the SMDK6400 architecture. The following changes were necessary prerequisites for the addition of other SoCs based on ARM1176. Existing board's (SMDK6400) configuration has been modified to keep behavior unchanged despite these changes. 1. Peripheral port remap configurability The earlier code had hardcoded remap values specific to s3c64xx in start.S. This change makes the peripheral port remap addresses and sizes configurable. 2. U-Boot code relocation support Most architectures allow u-boot code to run initially at a different address (possibly in NOR) and then get relocated to its final resting place in RAM. Added support for this capability in ARM1176 architecture. 3. Disable TCM if necessary If a ROM based bootloader happened to have initialized TCM, we disable it here to keep things sane. 4. Remove unnecessary SoC specific includes ARM1176 code does not really need this SoC specific include. The presence of this include prevents builds on other ARM1176 archs. 5. Modified virt-to-phys conversion during MMU disable The original MMU disable code masks out too many bits from the load address when it tries to figure out the physical address of the jump target label. Consequently, it ends up branching to the wrong address after disabling the MMU. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | AM35x: Add support for EMIF4Vaibhav Hiremath2010-06-08-0/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the EMIF4 interface available in the AM35x processors. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap3: Consolidate SDRC related operationsVaibhav Hiremath2010-06-08-168/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidated SDRC related functions into one file - sdrc.c And also replaced sdrc_init with generic memory init function (mem_init), this generalization of omap memory setup is necessary to support the new emif4 interface introduced in AM3517. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap3: Calculate CS1 size only when SDRC isVaibhav Hiremath2010-06-08-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | initialized for CS1 From: Vaibhav Hiremath <hvaibhav@ti.com> The patch makes sure that size for SDRC CS1 gets calculated only when the CS1 SDRC is initialized. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | ARM1176: TI: TNETV107X soc initial supportCyril Chemparathy2010-06-08-0/+1872
| | | | | | | | | | | | | | | | | | | | | | | | | | | TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a bunch on on-chip integrated peripherals. This is an initial commit with basic functionality, more commits with drivers, etc. to follow. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | ARM1176: Coexist with other ARM1176 platformsCyril Chemparathy2010-06-08-21/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current ARM1176 CPU specific code is too specific to the SMDK6400 architecture. The following changes were necessary prerequisites for the addition of other SoCs based on ARM1176. Existing board's (SMDK6400) configuration has been modified to keep behavior unchanged despite these changes. 1. Peripheral port remap configurability The earlier code had hardcoded remap values specific to s3c64xx in start.S. This change makes the peripheral port remap addresses and sizes configurable. 2. U-Boot code relocation support Most architectures allow u-boot code to run initially at a different address (possibly in NOR) and then get relocated to its final resting place in RAM. Added support for this capability in ARM1176 architecture. 3. Disable TCM if necessary If a ROM based bootloader happened to have initialized TCM, we disable it here to keep things sane. 4. Remove unnecessary SoC specific includes ARM1176 code does not really need this SoC specific include. The presence of this include prevents builds on other ARM1176 archs. 5. Modified virt-to-phys conversion during MMU disable The original MMU disable code masks out too many bits from the load address when it tries to figure out the physical address of the jump target label. Consequently, it ends up branching to the wrong address after disabling the MMU. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | ARM1136: Fix cache_flush() error and correct cpu_init_crit() commentsGeorge G. Davis2010-06-01-2/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0" instruction which means "Invalidate Both Caches" when in fact the intent is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7, c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate Both Caches" instruction to insure that memory is consistent with any dirty cache lines. Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so that they correctly describe the actual ARM1136 CP15 C7 Cache Operations used. Signed-off-by: George G. Davis <gdavis@mvista.com>
* | PXA: Add missing MDREFR bitsMarek Vasut2010-06-13-0/+3
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | PXA: Add UP2OCR register bit definitionsMarek Vasut2010-06-13-4/+18
|/ | | | | | | This register is used on PXA to control the USB Port2 operation (USB Port2 is the host port). Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* ARM Update mach-typesTom2010-05-28-6/+500
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 3defb2476166445982a90c12d33f8947e75476c4 Signed-off-by: Tom <Tom@bumblecow.com>
* ARM Update mach-typesTom2010-05-28-2/+665
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 257dab81413b31b8648becfe11586b3a41e5c29a Signed-off-by: Tom <Tom@bumblecow.com>
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