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* ARM: uniphier: add PXs3 SoC supportMasahiro Yamada2017-01-22-0/+27
| | | | | | Initial support for PXs3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add macro to generate SoC data look-up functionMasahiro Yamada2017-01-22-33/+23
| | | | | | | | There are similar functions that look up SoC data by the SoC ID. The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to avoid the code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: simplify SoC ID get functionMasahiro Yamada2017-01-22-317/+214
| | | | | | | | | | Currently, uniphier_get_soc_type() converts the SoC ID (this is read from the revision register) to an enum symbol to use it for SoC identification. Come to think of it, there is no need for the conversion in the first place. Using the SoC ID from the register as-is a straightforward way. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: replace <common.h> with <linux/delay.h> where possibleMasahiro Yamada2017-01-22-4/+5
| | | | | | | | | The <common.h> includes too many headers. Actually, these files needed to include it for udelay() declaration. Now we can replace it with <linux/delay.h> thanks to commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: replace <linux/err.h> with <linux/errno.h>Masahiro Yamada2017-01-22-14/+16
| | | | | | | | These files only need error number macros. Actually, IS_ERR(), PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid unnecessary header includes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: make SPL optional for ARVv8 SoCsMasahiro Yamada2017-01-22-20/+39
| | | | | | | | | | | | | | | | | | We may want to run different firmware before running U-Boot. For example, ARM Trusted Firmware runs before U-Boot, making U-Boot a non-secure world boot loader. In this case, the SoC might be initialized there, which enables us to skip SPL entirely. This commit removes "select SPL" to make it configurable. This also enables the Multi SoC support for the UniPhier ARMv8 SoCs. (CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and Device Tree, the U-Boot proper part is now written in a generic way. The board/SoC parameters reside in DT. The Multi SoC support increases the memory footprint a bit, but the U-Boot proper does not have strict memory constraint. This will mitigate the per-SoC (sometimes per-board) defconfig burden. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add missing static and const qualifierMasahiro Yamada2017-01-22-3/+3
| | | | | | These are file-internal and constant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix delay fixup code in LD11 UMC initKotaro Hayashi2017-01-22-0/+1
| | | | | | | | | The ddrphy_shift_rof_hws() never writes back the shifted delay value to the register, which makes this function non-effective. Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com> [masahiro: add git log] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: update UMC_MEMMAPSET value for LD20 SoCWataru Okoshi2017-01-22-2/+2
| | | | | | | Change bnk_typ's value from 8 to 0 (for G1's performance). Signed-off-by: Wataru Okoshi <okoshi.wataru@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move SBC and Support Card init code to U-Boot properMasahiro Yamada2017-01-18-27/+19
| | | | | | | | | | | | | | | Initialize SBC and Support Card in U-Boot proper instead of SPL. We may run different firmware (ex. ARM Trusted Firmware) before U-Boot, and basic SoC initialization may be done there. In that case, SPL may not be used. The motivation for preparing SBC and Support Card in SPL was to use LED for early debugging, but this is not mandatory to boot SoCs. With this commit, LED will be unavailable in SPL, but we can use a debug serial instead. So, this change will not be a big deal. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor spl_init_board()Masahiro Yamada2017-01-18-508/+250
| | | | | | | Merge init-*.c into a single file using a table of callbacks because the initialization flow is almost common among SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor board_init()Masahiro Yamada2017-01-18-95/+141
| | | | | | | The code here is cluttered due to the switch statement. Introduce a table of callbacks to clean up the initialization code across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: make BCU init into void functionMasahiro Yamada2017-01-17-10/+10
| | | | | | These functions never fail, so no need to return a value. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor Support Card init codeMasahiro Yamada2017-01-17-28/+8
| | | | | | | | | | | Splitting reset assertion (support_card_reset) and deassertion (support_card_init) is not adding much value any more. Handle all the initialization of Support Card in support_card_init(), then remove support_card_reset(). Also, detect_num_flash_banks() can have a static qualifier. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor SBC init codeMasahiro Yamada2017-01-17-110/+94
| | | | | | | Merge sbc-admulti.c and sbc-savepin.c into a single file to avoid code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor MEMCONF init codeMasahiro Yamada2017-01-17-259/+176
| | | | | | | | | | | | | | Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code. There are 3 patterns in terms of MEMCONF init: - DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11 - DRAM 3 channels: sLD3 - DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20 All of them can be moved into a single file by a little more refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: split out UMC clock enableMasahiro Yamada2017-01-17-69/+97
| | | | | | | | The clock enable bits for UMC are more SoC-specific than for the other hardware blocks. Separate the UMC clocks and the other clocks for better code reuse across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unneeded argument of uniphier_ld20_pll_init()Masahiro Yamada2017-01-17-11/+3
| | | | | | | At first, we thought the LD20 PLL setting would be board dependent, but this argument turned out unneeded after all. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-12-12-5/+7
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| * ARM: uniphier: remove unneeded parenthesesMasahiro Yamada2016-12-10-3/+3
| | | | | | | | | | | | Just a cosmetic cleanup. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: remove unneeded initializerMasahiro Yamada2016-12-10-2/+4
| | | | | | | | | | | | This will be used to store the return value of readl(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | spl: uniphier: Drop spl_board_announce_boot_device()Simon Glass2016-12-09-5/+0
| | | | | | | | | | | | This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | spl: Add a name to the SPL load-image methodsSimon Glass2016-12-09-1/+1
|/ | | | | | | | | | | It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: uniphier: update DRAM init code for LD11 SoCMasahiro Yamada2016-10-29-23/+391
| | | | | | Introduce run-time DDR PHY training. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: support DDR PHY parameter dump command for LD11Masahiro Yamada2016-10-29-6/+19
| | | | | | | | Add the LD11 SoC data and adjuts the printf() format because this is a 64-bit SoC. Otherwise, 16-digits pointer addresses would break the log format. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor DDR PHY parameter dump commandMasahiro Yamada2016-10-29-44/+50
| | | | | | | | | | Do not hard-code the number of DX blocks because it is a different value for LD11 SoC. Move the macro NR_DATX8_PER_DDRPHY to ddrphy-training.c since it is the last user. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoCMasahiro Yamada2016-10-29-294/+302
| | | | | | | | | The DDR PHY register view of LD11 is slightly different from that of LD4/Pro4/sLD8, but it will be possible to share the register macros (and I want to re-use as much code as possible). Change the code in the more flexible form. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3Masahiro Yamada2016-10-29-3/+5
| | | | | | | | | The USB boot without the stand-by MPU is available on ES3 or later of LD11 SoC, but the code in this if-conditional block must not be run when booting from USB. Check if the boot device is USB, and skip the code in the case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabledMasahiro Yamada2016-10-29-0/+13
| | | | | | | | At the moment, the clk driver is not clever enough to automatically enable parent clocks like Linux. Enable the STDMAC clock explicitly if USB is enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8Masahiro Yamada2016-10-29-3/+3
| | | | | | The status register should be polled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.hMasahiro Yamada2016-10-29-4/+4
| | | | | | | This PHY might be used for other SoCs in the future. Avoid including the SoC name in the header name. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: update DRAM init code for LD20 SoC (3rd)Masahiro Yamada2016-10-29-36/+83
| | | | | | | | - Constify UMC setting data arrays - Merge data arrays *_d0 and *_d1. - Add PHY parameters for LD20 C1 board Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unused board attribute macrosMasahiro Yamada2016-10-29-3/+0
| | | | | | After SoC evaluation, they turned out unnecessary. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable SSC for more PLLs for LD20 SoCMasahiro Yamada2016-10-29-13/+11
| | | | | | | | For Electro-Magnetic Compatibility. Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unneeded mdelay() in PLL setting functionMasahiro Yamada2016-10-29-2/+0
| | | | | | This delay is already cared by the callers of this function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: adjust fdt_file environment handling to latest LinuxMasahiro Yamada2016-10-29-12/+9
| | | | | | | The environment fdt_file is useful to remember the appropriate DTB file name. Adjust it to the recent renaming in the upstream kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unnecessary EHCI reset deassertionMasahiro Yamada2016-10-18-8/+6
| | | | | | | It is now deasserted by the reset controller driver. Drop the ad-hoc code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: sync DT with latest LinuxMasahiro Yamada2016-10-18-13/+13
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix addresses of Cortex-A72 gear setting macrosMasahiro Yamada2016-10-18-3/+3
| | | | | | My mistake during copy-paste work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* libfdt: Bring in upstream stringlist functionsSimon Glass2016-10-13-3/+2
| | | | | | | | | | | | | | These have now landed upstream. The naming is different and in one case the function signature has changed. Update the code to match. This applies the following upstream commits by Thierry Reding <treding@nvidia.com> : 604e61e fdt: Add functions to retrieve strings 8702bd1 fdt: Add a function to get the index of a string 2218387 fdt: Add a function to count strings Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: uniphier: insert udelay() just before support_card_reset_deassert()Masahiro Yamada2016-10-10-2/+1
| | | | | | | | | As for LD11/LD20, we can no longer rely on the udelay() in the PLL init functions. udelay(200) is needed here to keep the ethernet device in the reset state for enough time. Anyway, 200 usec is quite short for humans, so nobody cares it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add work-around for VBO noise problemMasahiro Yamada2016-10-10-0/+7
| | | | | | | Raise the VDD09 voltage line to 1.0V to suppress VBO noise. This errata work-around code is needed only for ES1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: update DRAM init code for LD20 SoC (2nd)Masahiro Yamada2016-10-10-333/+356
| | | | | | | | | | | - Do not reference CONFIG_DDR_FREQ; now the DDR frequency is passed from the uniphier_board_data structure - Constify parameter arrays - Tidy up cluttered macros - Lots of code cleanups - Lots of coding style fixes Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoCMasahiro Yamada2016-10-10-0/+1
| | | | | | For Electro-Magnetic Compatibility test. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: do not setup pins for System Bus on NAND boot modeMasahiro Yamada2016-10-10-2/+6
| | | | | | | | | For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed in the same I/O pins. When booting from a NAND device, pin-mux for the System Bus must not be set-up because they are exclusive with each other. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* spl: Pass spl_image as a parameter to load_image() methodsSimon Glass2016-10-06-4/+5
| | | | | | | | | Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* spl: Convert spl_board_load_image() to use linker listSimon Glass2016-10-06-1/+2
| | | | | | | | Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* spl: Convert boot_device into a structSimon Glass2016-10-06-1/+1
| | | | | | | | | | | At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* spl: Add a parameter to spl_parse_image_header()Simon Glass2016-10-06-1/+1
| | | | | | | | Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: uniphier: add PLL init code for LD11 SoCMasahiro Yamada2016-09-23-7/+71
| | | | | | | | | | - Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-08-20 15:04:47 +0000