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* ARM: uniphier: consolidate NAND pin-mux settingsMasahiro Yamada2016-09-18-19/+0
| | | | | | | | The NAND subsystem has not supported the Driver Model yet, but the NAND pin-mux data are already in the pinctrl drivers. Use them by calling pinctrl_generic_set_state() directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: delete unnecessary xHCI pin-mux settingsMasahiro Yamada2016-09-14-12/+0
| | | | | | | These ad-hoc pinmux settings were used for the legacy xHCI driver, which has gone now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add external IRQ setup codeMasahiro Yamada2016-07-02-0/+5
| | | | | | | | I will carry this work-around until it is cared in the kernel. This looks up the AIDET node and sets up a register to handle active low interrupt signals. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada2016-04-24-0/+46
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>