Commit message (Collapse) | Author | Age | Lines | |
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* | ARM: uniphier: add PLL init code for LD11 SoC | Masahiro Yamada | 2016-09-23 | -0/+16 |
- Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |