arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	ARM: uniphier: add uniphier_cache_set_active_ways()	Masahiro Yamada	2016-08-11	-0/+1
\| \| \| \| \| \| \| \|	This outer cache allows to control active ways independently for each CPU, so this function will be useful to set up active ways for a specific CPU. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
*	ARM: uniphier: add uniphier_cache_inv_way() to support way invalidation	Masahiro Yamada	2016-08-11	-0/+1
\| \| \| \| \| \|	This invalidates entries in specified ways of the outer cache. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
*	ARM: uniphier: export uniphier_cache_enable/disable functions	Masahiro Yamada	2016-08-11	-0/+2
\| \| \| \| \| \| \| \|	The System Cache (outer cache) is used not only as L2 cache, but also as locked SRAM. The functions for turning on/off it is necessary whether the L2 cache is enabled or not. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
*	ARM: uniphier: support prefetch and touch operations for outer cache	Masahiro Yamada	2016-08-11	-0/+17
	The UniPhier outer cache (L2 cache on ARMv7 SoCs) can be used as SRAM by locking ways. These functions will be used to transfer the trampoline code for SMP into the locked SRAM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>