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* ARM: uniphier: add PXs3 SoC supportMasahiro Yamada2017-01-22-0/+5
| | | | | | Initial support for PXs3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: make SPL optional for ARVv8 SoCsMasahiro Yamada2017-01-22-17/+32
| | | | | | | | | | | | | | | | | | We may want to run different firmware before running U-Boot. For example, ARM Trusted Firmware runs before U-Boot, making U-Boot a non-secure world boot loader. In this case, the SoC might be initialized there, which enables us to skip SPL entirely. This commit removes "select SPL" to make it configurable. This also enables the Multi SoC support for the UniPhier ARMv8 SoCs. (CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and Device Tree, the U-Boot proper part is now written in a generic way. The board/SoC parameters reside in DT. The Multi SoC support increases the memory footprint a bit, but the U-Boot proper does not have strict memory constraint. This will mitigate the per-SoC (sometimes per-board) defconfig burden. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: support DDR PHY parameter dump command for LD11Masahiro Yamada2016-10-29-1/+2
| | | | | | | | Add the LD11 SoC data and adjuts the printf() format because this is a 64-bit SoC. Otherwise, 16-digits pointer addresses would break the log format. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move CONFIG_SPL_* to defconfig or selectMasahiro Yamada2016-09-23-15/+0
| | | | | | | | | | | | As I repeated in the ML, I am unhappy with config entries with bare defaults. Kick them out of arch/arm/mach-uniphier/Kconfig. Currently, CONFIG_SPL_SERIAL_SUPPORT is not user-configurable (build fails without it), but it should be fixed later anyway, so I am moving CONFIG_SPL_SERIAL_SUPPORT to defconfigs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SPL_SERIAL_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_NAND_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_MMC_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_LIBGENERIC_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_LIBCOMMON_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: armv7: move CONFIG_ARMV7_PSCI to KconfigMasahiro Yamada2016-09-07-0/+1
| | | | | | | | | Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms can select. Then, move CONFIG_ARMV7_PSCI, which is automatically enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini2016-08-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
* ARM: uniphier: add PSCI support for UniPhier ARMv7 SoCsMasahiro Yamada2016-08-11-0/+2
| | | | | | Currently, only the CPU_ON function is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move (and rename) CONFIG_UNIPHIER_L2CACHE_ON to KconfigMasahiro Yamada2016-08-11-0/+7
| | | | | | | Move this option to Kconfig, renaming it into CONFIG_CACHE_UNIPHIER. The new option name makes sense enough, and the same as Linux has. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: select CONFIG_ARMV8_SPIN_TABLEMasahiro Yamada2016-07-23-0/+1
| | | | | | This is needed when booting Linux without ARM Trusted Firmware. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20Masahiro Yamada2016-06-20-0/+1
| | | | | | | | | | | | | | | | | | The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters periodically. This compensates for the voltage and temperature deviation and improves the PHY parameter adjustment. Instead, it requires 64 byte scratch memory in each DRAM channel for the dynamic training. The memory regions must be reserved in DT before jumping to the kernel. The scratch area can be anywhere in each DRAM channel, but the DRAM init code in SPL currently assigns it at the end of each channel. So, it makes sense to reserve the regions on run-time by U-Boot instead of statically embedding it in the DT in Linux. Anyway, a boot-loader should know much more about memory initialization than the kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move CONFIG_ARMV8_MULTIENTRY to KconfigMasahiro Yamada2016-06-20-0/+1
| | | | | | I just did not notice this option had an entry in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: introduce CONFIG_ARM_UNIPHIER_{32, 64}BITMasahiro Yamada2016-06-20-8/+15
| | | | | | | This will make it easier to select config options specific to particular ARM processor generation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PH1-LD11 SoC supportMasahiro Yamada2016-05-26-0/+5
| | | | | | This is a low-cost ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada2016-04-24-0/+5
| | | | | | This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable DDR PHY parameter dump commands by defaultMasahiro Yamada2016-03-24-0/+2
| | | | | | | | | These commands are not necessarily needed for usual operations (they are useful in case of DDR memory trouble), but enabling them by default would be nice in terms of the compilation test coverage. They are small enough, so limited impact on the memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: drop PH1- prefix from CONFIG options and file namesMasahiro Yamada2016-03-24-11/+10
| | | | | | | | The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: prepare directory structure for ARMv8 SoC supportMasahiro Yamada2016-03-01-0/+4
| | | | | | | | | | Before adding ARMv8 support, this commit refactors the directory structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32 to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the "select CPU_V7" to the lower-level menu because we will have to select ARM64 instead of CPU_V7 for ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: rework UniPhier SoC select in KconfigMasahiro Yamada2016-02-29-34/+28
| | | | | | | | | | The chains of "depends on <SoC_name>" in the current Kconfig is clumsy. The idea here is to allow users to choose a SoC group first (SoC group consists of some SoCs that can coexist in one binary). Then, allow to enable/disable each SoC support in the selected SoC group. This makes the Kconfig menu clearer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add dump command for DDR Multi PHY registersMasahiro Yamada2016-01-13-0/+9
| | | | | | | | The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY which is not register-compatible with the former SoCs. Add a new command to support the register dump of this IP. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: drop UniPhier specific SMP codeMasahiro Yamada2015-11-11-8/+0
| | | | | | | | | | | The latest Linux can directly handle SMP operations for UniPhier SoCs without any help of U-boot. Drop the relevant code from U-boot. See commit b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier: rework SMP operations to use trampoline code") in Linux Kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: uniphier: add ProXstream2 and PH1-LD6b supportMasahiro Yamada2015-09-25-0/+18
| | | | | | | The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PH1-Pro5 supportMasahiro Yamada2015-09-25-0/+9
| | | | | | | The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: allow to enable multiple SoCsMasahiro Yamada2015-09-25-28/+17
| | | | | | | | | | | | | | | | | | | | Before this commit, the Kconfig menu in mach-uniphier only allowed us to choose one SoC to be compiled. Each SoC has its own defconfig file for the build-test coverage. Consequently, some defconfig files are duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and CONFIG_{SOC_NAME}=y. Now, most of board-specific parameters have been moved to device trees, so it makes sense to include init code of multiple SoCs into a single image as long as the SoCs have similar architecture. In fact, some SoCs of UniPhier family are very similar: - PH1-LD4 and PH1-sLD8 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit) This commit will be helpful to merge some defconfig files for better maintainability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*Masahiro Yamada2015-09-25-7/+7
| | | | | | | I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify they belong to UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: drop DCC micro support card supportMasahiro Yamada2015-09-25-19/+4
| | | | | | | | | | Historically (for compatibility with very old platforms), two different types of micro support cards have been used with the UniPhier SoC development boards. It has been painful to maintain both. Having one of them is enough. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: UniPhier: add PH1-sLD3 SoC supportMasahiro Yamada2015-07-23-4/+8
| | | | | | | The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: set MACH_PH1_PRO4 as default SoCMasahiro Yamada2015-05-31-1/+1
| | | | | | | | | | | One disadvantage of commit a26cd04920dc (arch: Make board selection choices optional) is that Kconfig could create such an insane .config file that no board is selected. As PH1-Pro4 is the main stream of UniPhier SoC family, rip off the "optional" again in favor of PH1-Pro4 as the default SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: update the vendor name of UniPhier in KconfigMasahiro Yamada2015-05-31-3/+2
| | | | | | | | | The business for UniPhier Soc family has been transferred from Panasonic Corporation to Socionext Inc. Update the SoC select menu in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* arch: Make board selection choices optionalJoe Hershberger2015-05-12-0/+1
| | | | | | | | | | | | By making the board selections optional, every defconfig will include the board selection when running savedefconfig so if a new board is added to the top of the list of choices the former top's defconfig will still be correct. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
* malloc_f: enable SYS_MALLOC_F by default if DM is onMasahiro Yamada2015-03-28-3/+0
| | | | | | | | | | | | | | This option has a bool type, not hex. Fix it and enable it if CONFIG_DM is on because Driver Model always requires malloc memory. Devices are scanned twice, before/after relocation. CONFIG_SYS_MALLOC_F should be enabled to use malloc memory before relocation. As it is board-independent, handle it globally. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Robert Baldyga <r.baldyga@samsung.com>
* malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LENMasahiro Yamada2015-03-28-3/+0
| | | | | | | | | | The default value of CONFIG_SYS_MALLOC_F_LEN is defined by ./Kconfig as 0x400. Each defconfig or Kconfig need not repeat the same value. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Robert Baldyga <r.baldyga@samsung.com>
* ARM: UniPhier: remove unnecessary CONFIG_SYS_SOCMasahiro Yamada2015-03-24-3/+0
| | | | | | | | Since commit a86ac9540e20 (ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>), UniPhier platform does not need the symbolic link arch/arm/include/asm. This option is not necessary either. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: move SoC sources to mach-uniphierMasahiro Yamada2015-03-01-0/+89
Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit v1.1 at 2024-07-15 18:05:29 +0000