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* ARM: tegra: fix clock_get_periph_rate() for UART clocksStephen Warren2016-09-27-2/+36
| | | | | | | | | | | | | | | | | | | | | | Make clock_get_periph_rate() return the correct value for UART clocks. This change needs to be applied before the patches that enable CONFIG_CLK for Tegra SoCs before Tegra186, since enabling that option causes ns16550_serial_ofdata_to_platdata() to rely on clk_get_rate() for UART clocks, and clk_get_rate() eventually calls clock_get_periph_rate(). This change is a rather horrible hack, as explained in the comment added to the clock driver. I've tried fixing this correctly for all clocks as described in that comment, but there's too much fallout elsewhere. I believe the clock driver has a number of bugs which all cancel each-other out, and unravelling that chain is too complex at present. This change is the smallest change that fixes clock_get_periph_rate() for UART clocks while guaranteeing no change in behaviour for any other clock, which avoids other regressions. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add APIs the clock uclass driver will needStephen Warren2016-09-27-86/+283
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | A future patch will implement a clock uclass driver for Tegra. That driver will call into Tegra's existing clock code to simplify the transition; this avoids tieing the clock uclass patches into significant refactoring of the existing custom clock API implementation. Some of the Tegra clock APIs that manipulate peripheral clocks require both the peripheral clock ID and parent clock ID to be passed in together. However, the clock uclass API does not require any such "parent" parameter, so the clock driver must determine this information itself. This patch implements new Tegra- specific clock API clock_get_periph_parent() for this purpose. The new API is implemented in the core Tegra clock code rather than SoC- specific clock code. The implementation uses various SoC-/clock-specific data. That data is only available in SoC-specific clock code. Consequently, two new internal APIs are added that enable the core clock code to retrieve this information from the SoC-specific clock code. Due to the structure of the Tegra clock code, this leads to some unfortunate code duplication. However, this situation predates this patch. Ideally, future work will de-duplicate the Tegra clock code, and migrate it into drivers/clk/tegra. However, such refactoring is kept separate from this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add peripheral clock init tableStephen Warren2016-09-27-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, Tegra peripheral drivers control two aspects of their HW module clock(s): 1) The clock enable/rate for the peripheral clock itself. 2) The system-level clock tree setup, i.e. the clock parent. Aspect 1 is reasonable, but aspect 2 is a system-level decision, not something that an individual peripheral driver should in general know about or influence. Such system-level knowledge ties the driver to a specific SoC implementation, even when they use generic APIs for clock manipulation, since they must have SoC-specific knowledge such as parent clock IDs. Limited exceptions exist, such as where peripheral HW is expected to dynamically switch between clock sources at run-time, such as CPU clock scaling or display clock conflict management in a multi-head scenario. This patch enhances the Tegra core code to perform system-level clock tree setup, in a similar fashion to the Linux kernel Tegra clock driver. This will allow future patches to simplify peripheral drivers by removing the clock parent setup logic. This change is required prior to converting peripheral drivers to use the standard clock APIs, since: 1) The clock uclass doesn't currently support a set_parent() operation. Adding one is possible, but not necessary at the moment. 2) The clock APIs retrieve all clock IDs from device tree, and the DT bindings for almost all peripherals only includes information about the relevant peripheral clocks, and not any potential parent clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mmc: tegra: Add DM_MMC support to Tegra MMC driverTom Warren2016-09-27-24/+1
| | | | | | | | | | | Convert the Tegra MMC driver to DM_MMC. Support for non-DM is removed to avoid ifdefs in the code. DM_MMC is now enabled for all Tegra builds. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com> (swarren, fixed some NULL pointer dereferences, removed extraneous changes, rebased on various other changes, removed non-DM support etc.) Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: set MMC pin mux in board_init()Stephen Warren2016-09-27-7/+5
| | | | | | | | | Most other pin mux is configured in this function. This removes the need to do it in an MMC-specific initialization function, which is good since that function is going away later in this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mmc: tegra: move pad_init_mmc() into MMC driverStephen Warren2016-09-27-34/+0
| | | | | | | | | | pad_init_mmc() is performing an SoC-specific operation, using registers within the MMC controller. There's no reason to implement this code outside the MMC driver, so move it inside the driver. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-2/+2
| | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SPL_SERIAL_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_LIBGENERIC_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_LIBCOMMON_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SPL_GPIO_SUPPORT to KconfigSimon Glass2016-09-16-0/+3
| | | | | | Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: armv7: move CONFIG_ARMV7_PSCI to KconfigMasahiro Yamada2016-09-07-0/+1
| | | | | | | | | Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms can select. Then, move CONFIG_ARMV7_PSCI, which is automatically enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: tegra: remove wrong dependency on SPL_BUILDMasahiro Yamada2016-09-07-2/+2
| | | | | | | SPL_BUILD is not a CONFIG in Kconfig, so !SPL_BUILD is always true. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: tegra: Add support for TK1-SOM board from Colorado EngineeringPeter Chubb2016-09-01-0/+12
| | | | | | | | | | | | | | The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: reduce CSITE clock from 204M to 136MBryan Wu2016-08-15-1/+1
| | | | | | | | | | | The L4T kernel complains about a CSITE clock rate above 144MHz, presumably because the HW is only characterized for a clock less than that. Adjust the rate to 136MHz to avoid the warning and stay in spec. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, re-wrote commit description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move ft_system_setup()Stephen Warren2016-08-15-31/+35
| | | | | | | | | | | Currently, ft_system_setup() is implemented by board*.c, which are a bit of a dumping ground for a bunch of unrelated functionality, and separate versions exist for pre-Tegra186 and Tegra186. Move the implementation into a separate file to separate functionality, and allow sharing. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* reset: add Tegra186 reset driverStephen Warren2016-08-15-0/+2
| | | | | | | | | | | In Tegra186, on-SoC reset signals are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* clock: add Tegra186 clock driverStephen Warren2016-08-15-0/+2
| | | | | | | | | | | | In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. A tegra/ sub-directory is created to follow the existing pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* misc: add Tegra BPMP driverStephen Warren2016-08-15-0/+2
| | | | | | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. This driver provides the core low-level communication path by which feature-specific drivers (such as clock) can make requests to the BPMP. This driver is similar to an MFD driver in the Linux kernel. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-08-05-1/+6
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| * ARM: tegra: call tegra_board_init on Tegra186Stephen Warren2016-08-04-1/+6
| | | | | | | | | | | | | | | | | | | | Introduce tegra_board_init() and call it from board_init(). Tegra wil use tegra_board_init() for board-specific initialization, and board_init() for SoC-specific initialization. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: Rework and correct barrier definitionsTom Rini2016-08-05-1/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: tegra: pick up actual memory sizeStephen Warren2016-07-21-12/+110
| | | | | | | | | | | | | | | | | | | | | | | On Tegra186, U-Boot is booted by the binary firmware as if it were a Linux kernel. Consequently, a DTB is passed to U-Boot. Cache the address of that DTB, and parse the /memory/reg property to determine the actual RAM regions that U-Boot and subsequent EL2/EL1 SW may actually use. Given the binary FW passes a DTB to U-Boot, I anticipate the suggestion that U-Boot use that DTB as its control DTB. I don't believe that would work well, so I do not plan to put any effort into this. By default the FW-supplied DTB is the L4T kernel's DTB, which uses non-upstreamed DT bindings. U-Boot aims to use only upstreamed DT bindings, or as close as it can get. Replacing this DTB with a DTB using upstream bindings is physically quite easy; simply replace the content of one of the GPT partitions on the eMMC. However, the binary FW at least partially relies on the existence/content of some nodes in the DTB, and that requires the DTB to be written according to downstream bindings. Equally, if U-Boot continues to use appended DTBs built from its own source tree, as it does for all other Tegra platforms, development and deployment is much easier. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add IVC protocol implementationStephen Warren2016-07-21-0/+563
| | | | | | | | | | | | IVC (Inter-VM Communication) protocol is a Tegra-specific IPC (Inter Processor Communication) framework. Within the context of U-Boot, it is typically used for communication between the main CPU and various auxiliary processors. In particular, it will be used to communicate with the BPMP (Boot and Power Management Processor) on Tegra186 in order to manipulate clocks and reset signals. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: unify Tegra186 Makefile a bitStephen Warren2016-07-21-9/+6
| | | | | | | | | | | | | | | Many files in arch/arm/mach-tegra are compiled conditionally based on Kconfig variables, or applicable to all platforms. We can let the main Tegra Makefile handle compiling (or not) those files to avoid each SoC- specific Makefile needing to duplicate entries for those files. This leaves the SoC-specific Makefiles to compile truly SoC-specific code. In the future, we'll hopefully add Kconfig variables for all the other files, and refactor those files, and so reduce the need for SoC-specific Makefiles and/or ifdefs in the Makefiles. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-07-19-2/+4
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
| * armv8: mmu: Add support of non-identical mappingYork Sun2016-07-15-2/+4
| | | | | | | | | | | | | | Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com>
* | Various, unrelated tree-wide typo fixes.Robert P. J. Day2016-07-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | ARM: PSCI: Switch to per-CPU target PC storage in secure data sectionChen-Yu Tsai2016-07-15-5/+6
| | | | | | | | | | | | | | | | | | | | | | Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: PSCI: Remove unused psci_text_end symbolChen-Yu Tsai2016-07-15-2/+0
| | | | | | | | | | | | | | | | | | psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: PSCI: Split out common stack setup code from psci_arch_initChen-Yu Tsai2016-07-15-3/+0
|/ | | | | | | | | | | | | | | Every platform has the same stack setup code in assembly as part of psci_arch_init. Move this out into a common separate function, psci_stack_setup, for all platforms. This will allow us to move the remaining parts of psci_arch_init into C code, or drop it entirely. Also provide a stub no-op psci_arch_init for platforms that don't need their own specific setup code. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* mailbox: add Tegra186 HSP driverStephen Warren2016-06-19-0/+2
| | | | | | | | | | Tegra186's HSP module implements doorbells, mailboxes, semaphores, and shared interrupts. This patch provides a driver for HSP, and hooks it into the mailbox API. Currently, only doorbells are supported. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: tegra: add p2771-0000 board supportStephen Warren2016-05-31-0/+10
| | | | | | | | | | | | | | | | | | | | P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO expansion headers. Currently, due to U-Boot's level of support for Tegra186, the only features supported by U-Boot are the console UART and the on-board eMMC. Additional features will be added over time. U-Boot has so far been tested by replacing the kernel image on the device with a U-Boot binary. It is anticipated that U-Boot will eventually replace the CCPLEX bootloader binary, as on previous chips. This hasn't yet been tested. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add core Tegra186 supportStephen Warren2016-05-31-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the bare minimum code to support Tegra186, with UART and eMMC working. The empty gpio.h is required because <asm/gpio.h> includes it. A future cleanup round may be able to solve this for all Tegra generations at once. mach-tegra/Makefile is adjusted not to compile anything for Tegra186, but instead to defer everything to mach-tegra/tegra186/Makefile. This allows the SoC code to pick-and-choose which of the C files in the "common" mach-tegra/ directory to compile in based on the SoC's needs. Most of the code is not valid for Tegra186, and this approach removes the need for mach-tegra/Makefile to contain many SoC-specific ifdefs. This approach may be applied to all other Tegra SoCs in a future cleanup round. board186.c is introduced to replace board.c and board2.c. These files currently contain a slew of SoC- and board-specific code that is not valid for Tegra186. This approach avoids adding yet more ifdefs to those files. A future cleanup round may refactor most of board*.c into board-/ SoC-specific functions files thus allowing the top-level functions like board_init_early_f to be shared again. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: convert CONFIG_TEGRA_GPIO to KconfigStephen Warren2016-05-31-0/+2
| | | | | | | | | | | | | | Future chips will contain different GPIO HW. This change will enable future SoC support to select the appropriate GPIO driver for their HW, in a future-looking fashion, using Kconfig. TEGRA_GPIO is not simply selected by TEGRA_COMMON (even though all current Tegra chips used this GPIO HW) to simplify the later addition of support for Tegra SoCs that use different GPIO HW. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: enable GPU node by compatible valueStephen Warren2016-05-04-14/+21
| | | | | | | | | | | | | | | | | | | In current Linux kernel Tegra DT files, 64-bit addresses are represented in unit addresses as a pair of comma-separated 32-bit values. Apparently this is no longer the correct representation for simple busses, and the unit address should be represented as a single 64-bit value. If this is changed in the DTs, arm/arm/mach-tegra/board2.c:ft_system_setup() will no longer be able to find and enable the GPU node, since it looks up the node by name. Fix that function to enable nodes based on their compatible value rather than their node name. This will work no matter what the node name is, i.e for DTs both before and after any rename operation. Cc: Thierry Reding <treding@nvidia.com> Cc: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra210: set PLLE_PTS bit when enabling PLLEStephen Warren2016-03-29-0/+2
| | | | | | | | This bit needs to be set for system suspend/resume to work. This setting will be documented in an updated TRM at some time in the future. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Replace home grown mmu code with generic table approachAlexander Graf2016-03-15-115/+17
| | | | | | | Now that we have nice table driven page table creating code that gives us everything we need, move to that. Signed-off-by: Alexander Graf <agraf@suse.de>
* video: tegra: Correct a Kconfig warning with VIDCONSOLE_AS_LCDSimon Glass2016-02-17-1/+1
| | | | | | | | | | This new feature causes a Kconfig warning on boards without a display enabled. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: video: Clean up the old LCD/PWM driver codeSimon Glass2016-02-16-115/+2
| | | | | | | | Remove the old PWM code. Remove calls to CONFIG_LCD functions now that we are using driver model for video. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: video: Move LCD driver to use the DM PWM driverSimon Glass2016-02-16-0/+1
| | | | | | | | Use the driver-model PWM driver in preference to the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: video: Merge the display driver into one fileSimon Glass2016-02-16-380/+0
| | | | | | | | | | | At present we have code in arch/arm and code in drivers/video. Move it all into drivers/video since it is a display driver and our current approach is to put all driver code in drivers/. Make a few functions static now that they are not used outside the file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20Simon Glass2016-02-16-1/+1
| | | | | | | | | | | This option refers only to the tegra20 video driver, so name it as such to avoid confusion with tegra124. Also move this option to Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Allow CONFIG_DM_VIDEO to be used as well as CONFIG_LCDSimon Glass2016-02-16-2/+6
| | | | | | | | While we transition to using driver model for video, we need to support both options. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Allow driver model to be used for the PWMSimon Glass2016-02-16-1/+2
| | | | | | | We can skip this manual init when using driver model for the PWM. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* video: tegra: Enable the 'lcd' env variable work-aroundSimon Glass2016-02-11-0/+1
| | | | | | | Enable this option on all tegra boards. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* ARM: tegra: shut down USB device controller at bootStephen Warren2016-01-28-1/+22
| | | | | | | | | | | | | | When loading U-Boot into RAM over USB protocols using tools such as tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device mode controller is initialized and enumerated by the host PC running the tool. Unfortunately, these tools do not shut down the USB controller before executing the downloaded code, and so the host PC does not "de-enumerate" the USB device. This patch implements optional code to shut down the USB controller when U-Boot boots to avoid leaving a stale USB device present. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* bug.h: move BUILD_BUG_* defines to include/linux/bug.hMasahiro Yamada2016-01-25-0/+1
| | | | | | | | | | | | | | | | BUILD_BUG_* macros have been defined in several headers. It would be nice to collect them in include/linux/bug.h like Linux. This commit is cherry-picking useful macros from include/linux/bug.h of Linux 4.4. I did not import BUILD_BUG_ON_MSG() because it would not work if it is used with include/common.h in U-Boot. I'd like to postpone it until the root cause (the "error()" macro in include/common.h causes the name conflict with "__attribute__((error()))") is fixed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-88/+8
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: tegra: net: Convert tegra boards to driver model for EthernetSimon Glass2016-01-12-0/+1
| | | | | | | | | Adjust all Tegra boards to use driver model for Ethernet, now that the required drivers are converted. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit v1.1 at 2024-11-08 03:30:01 +0000