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path: root/arch/arm/mach-socfpga/spl.c
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* arm: socfpga: Unreset NAND in SPLMarek Vasut2015-12-22-0/+1
| | | | | | | | If the system boots from NAND, make sure to de-assert the NAND IP reset, otherwise the system will get stuck. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Do not call board_init_r() from board_init_f()Marek Vasut2015-09-04-2/+0
| | | | | | | | | | | Instead of calling board_init_r() directly from board_init_f(), just return from board_init_f(). This will make the code continue executing in crt0.S _main(), from which the board_init_r() is called. This patch aligns the SoCFPGA SPL with the correct SPL design as well as reduces the stack utilisation slightly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: config: Move SPL GD and malloc to RAMMarek Vasut2015-08-08-0/+3
| | | | | | | | | | | Now that the SPL structure is organised such that it matches the U-Boot's SPL design, it is possible to use the option of relocating GD to RAM. And since we have GD in RAM, move malloc area to RAM as well. We point the malloc base pointer 1 MiB past U-Boot's load address. We use simple malloc for SPL because it is 3kiB smaller in terms of code size than regular malloc which was used thus far. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add support for selecting boot device from BSELMarek Vasut2015-08-08-12/+23
| | | | | | | | Rework spl_boot_device() such that it reads the BSEL settings from system manager and decides from where to load U-Boot based on this information. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add support for booting from QSPIMarek Vasut2015-08-08-1/+4
| | | | | | | Add code and configuration options to support booting from QSPI NOR. Enable support for booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add support for booting from SD/MMCMarek Vasut2015-08-08-0/+17
| | | | | | | | | | Add code and configuration options to support booting from RAW SD/MMC card as well as for ext4/vfat filesystems. Enable support for booting from SD/MMC card, but don't enable the filesystem support just yet to retain compatibility with old SoCFPGA card format. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Merge spl_board_init() into board_init_f()Marek Vasut2015-08-08-17/+12
| | | | | | | | | | The code in spl_board_init() should have been in board_init_f() from the beginning, since it is code which configures system and then starts DRAM. Thus, it cannot be in spl_board_init(), which is called from board_init_r() , which already expects a working DRAM. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add missing reset logicMarek Vasut2015-08-08-1/+9
| | | | | | | | Make sure that all the peripherals are correctly reset and then brought out of reset in the SPL. Not going through proper reset cycle might leave the IP blocks in inconsistent state. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Configure SCU and NIC-301 earlyMarek Vasut2015-08-08-0/+22
| | | | | | | | | Configure the ARM SCU and NIC301 very early. The ARM SCU SNSAC register must be configured, so we can access all peripherals. The NIC-301 must be configured so that the BootROM is not mapped into the SDRAM address space. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Toggle warm reset config I/O bitMarek Vasut2015-08-08-0/+5
| | | | | | | Synchronise the SPL behavior with the original Altera code and toggle the Warm Reset Config I/O bit accordingly. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: system: Rework sysmgr_enable_warmrstcfgio()Marek Vasut2015-08-08-1/+1
| | | | | | | | Rework sysmgr_enable_warmrstcfgio() into sysmgr_config_warmrstcfgio(), which allows both enabling and disabling the warm reset config I/O functionality. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: clock: Clean up pll_config.hMarek Vasut2015-08-08-111/+3
| | | | | | | | | | | | | | | | | | | | | | | Extract the clock configuration horribleness caused by pll_config.h in the following manner. First of all, introduce a few new accessors which return values of various clocks used in clock_manager.c and use them in clock_manager.c . These accessors replace those few macros which came from pll_config.h originally. Also introduce an accessor which returns the struct cm_config default configuration for the clock manager used in SPL. The accessors are implemented in a board-specific wrap_pll_config.c file, whose sole purpose is to include the qts-generated pll_config.h and provide only the necessary values to the clock manager. The purpose of this design is to limit the scope of inclusion for the pll_config.h , which thus far was included build-wide and poluted the namespace. With this change, the inclusion is limited to just the new wrap_pll_config.c file, which in turn provides three simple functions for the clock_manager.c to use. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: clock: Get rid of cm_config_t typedefMarek Vasut2015-08-08-1/+1
| | | | | | Get rid of this cryptic typedef and replace it with explicit struct cm_config. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: reset: Replace ad-hoc reset functionsMarek Vasut2015-08-08-3/+3
| | | | | | | | Replace all those ad-hoc reset functions, which were all copies of the same invocation of clrbits_le32() anyway, with one single unified function, socfpga_per_reset(), with necessary parameters. Signed-off-by: Marek Vasut <marex@denx.de>
* ARM: socfpga: move SoC sources to mach-socfpgaMasahiro Yamada2015-05-07-0/+229
Our recent trend is to collect SoC files into arch/arm/mach-(SOC). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>