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* ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See2016-10-27-1/+7
| | | | | | | | | | To enable configuration of sdr.ctrlcfg.extratime1 register which enable extra clocks for read to write command timing. This is critical to ensure successful LPDDR2 interface Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut2015-08-08-0/+17
| | | | | | | | | | | Introduce structure socfpga_sdram_misc_config to wrap the remaining misc configuration values in board file. Again, introduce a function, socfpga_get_sdram_misc_config(), which returns this the structure. This is almost the final step toward wrapping the nasty QTS generated macros in board files and reducing the pollution of the namespace. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap IO_* macrosMarek Vasut2015-08-08-0/+19
| | | | | | | | | | | Introduce structure socfpga_sdram_io_config to wrap the IO configuration values in board file. Introduce socfpga_get_sdram_io_config() function, which returns this the structure. This is another step toward wrapping the nasty QTS generated macros in board files and reducing the pollution of the namespace. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap RW_MGR_* macrosMarek Vasut2015-08-08-0/+64
| | | | | | | | | | | Introduce structure socfpga_sdram_rw_mgr_config to wrap the RW manager configuration values in board file. Introduce a complementary function, socfpga_get_sdram_rwmgr_config(), which returns this the structure. This is another step toward wrapping the nasty QTS generated macros in board files and reducing the pollution of the namespace. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_initMarek Vasut2015-08-08-0/+3
| | | | | | | | | | Introduce two wrapper functions, socfpga_get_seq_ac_init() and socfpga_get_seq_inst_init() to avoid direct inclusion of the sequencer_auto_ac_init.h and sequencer_auto_inst_init.h QTS generated files. This reduces namespace pollution again. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sequencer: Clean up mach/sdram.hMarek Vasut2015-08-08-3/+1
| | | | | | | | Zap non-existent functions and place function prototypes at the beginning of the header file. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ddr: altera: sdram: Introduce socfpga_sdram_get_config()Marek Vasut2015-08-08-0/+42
| | | | | | | | | | Introduce socfpga_sdram_get_config() function implement in a board file, which returns the socfpga_sdram_config structure. This is the last step in cleaning up the socfpga_mmr_init_full(), but not the last step which allows removing the inclusion of sdram.h from drivers/ddr/altera/sdram.c thus far. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8Marek Vasut2015-08-08-1/+1
| | | | | | Fix the return value so that standard errno return values can be used. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESSMarek Vasut2015-08-08-1/+1
| | | | | | | Just trim down the constant SOCFPGA_SDR_ADDRESS + SDR_PHYGRP.*ADDRESS in the code. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: Move struct sdram_prot_rule prototypeMarek Vasut2015-08-08-13/+0
| | | | | | | | | | | Move the structure prototype from sdram.h header file into sdram.c source file, since it is used only there and for local purpose only. There is no point in having it global. While at this move, fix the data types in the structure from uintNN_t to uNN and fix the coding style a bit. Signed-off-by: Marek Vasut <marex@denx.de>
* driver/ddr/altera: Add DDR driver for Altera's SDRAM controllerDinh Nguyen2015-08-08-12/+299
| | | | | | | | This patch enables the SDRAM controller that is used on Altera's SoCFPGA family. This patch configures the SDRAM controller based on a configuration file that is generated from the Quartus tool, sdram_config.h. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ARM: socfpga: move SoC headers to mach-socfpga/include/machMasahiro Yamada2015-05-07-0/+19
Move headers to mach-socfpga as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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