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* compat: Remove is_power_of_2() definitionFabio Estevam2015-11-05-1/+1
| | | | | | | | | | Use the is_power_of_2() definition from log2.h to align with the kernel implementation. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arm: mvebu: Add DM (driver model) supportStefan Roese2015-10-21-3/+0
| | | | | | | | | | | | | | | | This patch adds driver model support for some Marvell MVEBU SoC's. Including Armada XP and 38x. All 3 currently mainlined boards are converted. DM is now selected automatically for MVEBU platforms. With this DM support now available for MVEBU, hardcoding the base addresses and other information is not necessary any more. Probing should be done by using the values provided via the device tree now instead. For this the driver also need to be converted to DM. Patches for some of the drivers will follow. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Do not call board_init_r() from board_init_f()Stefan Roese2015-10-21-2/+0
| | | | | | | | | | | | | Instead of calling board_init_r() directly from board_init_f(), just return from board_init_f(). This will make the code continue executing in crt0.S _main(), from which the board_init_r() is called. This patch aligns the MVEBU SPL with the correct SPL design as well as reduces the stack utilisation slightly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Only set CONFIG_SKIP_LOWLEVEL_INIT for SPLStefan Roese2015-10-21-12/+19
| | | | | | | | | When running on the AXP I sometimes noticed a strange behavior. As some characters are not echoed on the U-Boot prompt. Not disabling the lowlevel_init code, especially calling cpu_init_cp15() in the main U-Boot seems to solve this issue. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add option to use UART xmodem protocol via kwbootStefan Roese2015-10-21-1/+54
| | | | | | | | | | | | | | | | | | | | | | This patch enables the use of the kwboot tool, to boot mainline U-Boot on the Marvell Armada XP/38x SoC's. This is done by returning to the SoC's BootROM after SPL has initialized the SDRAM. We need to make sure to not reconfigure the internal register space and MBARs. Otherwise the BootROM will not be able to continue after SPL jumps back to it. To use this feature, please don't forget to change the BOOT_FROM line in your board specfic kwbimage.cfg file this way: BOOT_FROM uart Tested on these Marvell eval boards: DB-MV784MP-GP - Armada XP DB-88F6820-GP - Armada 38x Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Move Armada XP/38x Kconfig to mach specific Kconfig fileStefan Roese2015-10-20-0/+21
| | | | | | Introduce a mach-mvebu/Kconfig for all Armada based SoC's. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: timer.c: Explicitly move "init_done" var to data sectionStefan Roese2015-10-01-1/+1
| | | | | | | | | | | | | As reported by Simon Guinot, commit ade741b3 "arm: mvebu: Call timer_init early before PHY and DDR init" breaks Kirkwood platforms. As the static variable "init_done" is not available at that early boot time. This patch moves it to explicitly to the data section, making it available at that time. Signed-off-by: Stefan Roese <sr@denx.de> Reported-by: Simon Guinot <simon.guinot@sequanux.org> Cc: Luka Perkov <luka.perkov@sartura.hr> Tested-by: Simon Guinot <simon.guinot@sequanux.org>
* arm: mvebu: Fix internal register config on A38xStefan Roese2015-10-01-14/+22
| | | | | | | | | | | | | | | | | Currently booting on A38x is broken. As the current code tries to detect the SoC family to disable the MMU for the A38x at runtime. But before the internal registers are switched to the new location (0xf100.0000), this runtime detection does not work. As all macros / defines are already assigned to the new location at 0xf100.0000. But the registers are sill mapped to the default location at 0xd000.0000. This patch now makes sure, no such runtime detection is used before the internal registers are configured to the new location. After this, the remaining cache cleanup is executed. Signed-off-by: Stefan Roese <sr@denx.de> Reported-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* bitops: introduce BIT() definitionHeiko Schocher2015-09-11-2/+0
| | | | | | | | | | | introduce BIT() definition, used in at91_udc gadget driver. Signed-off-by: Heiko Schocher <hs@denx.de> [remove all other occurrences of BIT(x) definition] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* pci: mvebu: Add PCIe driverAnton Schubert2015-08-17-8/+0
| | | | | | | | | | | | | | | | | | | This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the driver, this patch also removes the statically defined PCI MBUS windows. As they are not needed anymore, since this PCIe driver now creates the windows dynamically. Tested on Armada XP db-mv784mp-gp eval board using an Intel E1000 PCIe card in all 3 PCIe slots. And on the Armada 38x db-88f6820-gp eval board using this Intel E1000 PCIe card in the PCIe 0 slot. This port was done in cooperation with Anton Schubert. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
* arm: mvebu: Add complete SDRAM ECC scrubbingStefan Roese2015-08-17-6/+139
| | | | | | | | | | | | This patch introduces the SDRAM scrubbing for ECC enabled board to fill/initialize the ECC bytes. This is done via the XOR engine to speed up the process. The scrubbing is a 2-stage process: 1) SPL scrubs the area 0 - 0x100.0000 (16MiB) for the main U-Boot 2) U-Boot scrubs the remaining SDRAM area(s) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: dram.c: Rework dram_init() and dram_init_banksize()Stefan Roese2015-08-17-9/+21
| | | | | | | | | | | | | Rework these functions so that dram_init_banksize() does not call dram_init() again. It only needs to set the banksize values in the bdinfo struct. Make sure to also clip the size of the last bank if it exceeds the maximum allowed value of 3 GiB (0xc000.0000). Otherwise other address windows (e.g. PCIe) will overlap with this memory window. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Display ECC enabled / disabled upon bootupStefan Roese2015-08-17-0/+19
| | | | | | | | | This patch adds "(ECC enabled)" or "(ECC disabled)" to the DRAM bootup text. Making it easier for board with SPD DIMM's to see, if ECC is enabled or not. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Enable USB EHCI support on Armada XPStefan Roese2015-08-17-0/+44
| | | | | | | | | | | | | | | | | This patch enables the USB EHCI support for the Marvell Armada XP (AXP) SoCs. In compatism to the Armada 38x (A38x), the AXP needs to configure the USB PLL and the USB PHY's specifically in U-Boot. The A38x has done this already in the bin_hdr (SPL U-Boot). Without this, accessing the controller registers in U-Boot or Linux will hang the CPU. Additionally, the AXP uses a different USB EHCI base address. This patch also takes care of this by runtime SoC detection in the Marvell EHCI driver. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Cc: Marek Vasut <marex@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Enable NAND controller on MVEBU SoC'sStefan Roese2015-08-17-2/+40
| | | | | | | | | | | | | This patch enables the NAND controller on the Armada XP/38x and provides a new function that returns the NAND controller input clock. This function will be used by the MVEBU NAND driver. As part of this patch, the multiple BIT macro definitions are moved to a common place in soc.h. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Peter Morrow <peter@senient.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Disable MBUS error propagationStefan Roese2015-08-17-0/+6
| | | | | | | | | Accessing MBUS windows not backed-up by e.g. PCIe devices will hang the SoC. Disable MBUS error propagation back to CPU allows to read 0xffffffff instead of hanging the SoC. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Flush caches and disable MMU only on A38xStefan Roese2015-08-17-7/+19
| | | | | | | | | | | | | | | | Only with disabled MMU its possible to switch the base register address on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not accessible, as its still locked to cache. So to fully release / unlock this area from cache, we need to first flush all caches, then disable the MMU and disable the L2 cache. On Armada XP this does not seem to be needed. Even worse, with this code added, I sometimes see strange input charactes loss from the console. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Setup the MBUS bridge registersStefan Roese2015-08-17-0/+58
| | | | | | | | | | | | | | With this patch, the MBUS bridge registers (base and size) are configured upon each call to mbus_dt_setup_win(). This is needed, since the board code can also call this function in later boot stages. As done in the maxbcm board. This is needed to fix a problem with the secondary CPU's not booting in Linux on AXP. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Peter Morrow <peter@senient.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Change MBUS base addresses and sizesStefan Roese2015-08-17-10/+16
| | | | | | | | | This patch changes the MBUS base addresses and sizes to use more generic names and also adds defines for the sizes. It also moves the base address to higher addresses. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu/armada100: dram.c: Remove CONFIG_SYS_BOARD_DRAM_INITStefan Roese2015-08-17-2/+0
| | | | | | | | CONFIG_SYS_BOARD_DRAM_INIT is not defined anywhere. So lets get rid of all references here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add SPL SDIO/MMC boot supportStefan Roese2015-07-24-1/+12
| | | | | | | | | | | | This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since I don't know of a way to test the boot-device upon runtime, this patch hardcodes the spl_boot_device instead. Tested on Marvell DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
* arm: mvebu: a38x: Use correct PEX register access macrosStefan Roese2015-07-23-0/+4
| | | | | | | Remove the incorrect PEX macros from the DDR header. And insert the correct ones in ctrl_pex.h instead. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directoryStefan Roese2015-07-23-2/+2
| | | | | | | | | | | | | | | | With the upcoming addition of the Armada 38x DDR support, which is not compatible to the Armada XP DDR init code, we need to introduce a new directory infrastructure. To support multiple Marvell DDR controller. This will be the new structure: drivers/ddr/marvell/axp Supporting Armada XP (AXP) devices (and perhaps Armada 370) drivers/ddr/marvell/a38x Supporting Armada 38x devices (and perhaps Armada 39x) Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add Armada 38x SERDES / PHY init code from Marvell bin_hdrStefan Roese2015-07-23-0/+5204
| | | | | | | | This code is ported from the Marvell bin_hdr code into mainline SPL U-Boot. It needs to be executed very early so that the devices connected to the serdes PHY are configured correctly. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: serdes: Move Armada XP SERDES / PHY init code into new directoryStefan Roese2015-07-23-1/+2
| | | | | | | | | With the upcoming addition of the Armada 38x SPL support, which is not compatible to the Armada XP SERDES init code, we need to introduce a new directory infrastructure. So lets move the AXP serdes init code into a new directory. This way the A38x code can be added in a clean way. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Disable MMU before changing register base addressStefan Roese2015-07-23-0/+18
| | | | | | | | Only with disabled MMU its possible to switch the base register address on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not accessible, as its still locked to cache. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: spl.c: Add call to board_early_init_f()Stefan Roese2015-07-23-0/+7
| | | | | | | Pin muxing needs to be done before UART output, since on A38x the UART pins need some re-muxing for output to work. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Use default reg base address for SPL on A38xStefan Roese2015-07-23-0/+10
| | | | | | | | | On A38x switching the regs base address without running from SDRAM doesn't seem to work. So let the SPL still use the default base address and switch to the new address in the mail u-boot later. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Call timer_init early before PHY and DDR initStefan Roese2015-07-23-0/+9
| | | | | | | | | | Without calling timer_init(), the xdelay() functions return immediately. We need to call timer_init() early, so that these functions work and the PHY and DDR init code works correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anton Schubert <anton.schubert@gmx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: add Armada XP SATA supportAnton Schubert2015-07-23-0/+1
| | | | | | | | | | This patch initializes the SATA address windows on Armada XP and allows it to work with the existing mvsata_ide driver. It also adds the necessary configuration for the db-mv784mp-gp board. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Tested-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* usb: Add EHCI support for Armada 38x (mvebu)Stefan Roese2015-07-10-0/+1
| | | | | | | | | | | This patch adds USB EHCI host support for the common mvebu platform. Including the Armada 38x. Tested on DB-88F6280-GP eval board. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add SATA/SCSI (AHCI) support for Armada A38xStefan Roese2015-07-10-0/+56
| | | | | | | | | | This patch adds support for the common AHCI controller on the Marvell Armada 38x. Tested on the Marvell DB-88F6820-GP eval board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add SDIO/SDHCI support for Armada A38xStefan Roese2015-07-10-0/+24
| | | | | | | | | | | | Armada A38x implements an SDHCI compatible SDIO controller. This patch enables the Marvell driver to support this SoC. And enables the SDIO controller if selected by the board configuration. Tested on Marvell DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Update CBAR with SOC regs baseKevin Smith2015-06-14-0/+7
| | | | | | | | | SMP-enabled Linux kernels read the CBAR register in CP15 to find the address of the SCU registers. After remapping internal registers, also update the CBAR so the kernel can find them. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Disable L2 cache before enabling d-cacheStefan Roese2015-06-14-0/+8
| | | | | | | | L2 cache may still be enabled by the BootROM. We need to first disable it before enabling d-cache support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
* arm: mvebu: Remove "u-boot.kwb" CONFIG_BUILD_TARGET for non-SPL targetsStefan Roese2015-05-05-2/+0
| | | | | | | | | | | | | | | | | | By removing this default build target, the "u-boot.kwb" target is not automatically generated. This fixes a temporary build error when using out-of-tree builds, as buildman does per default (reported by Simon). When the full SPL support is added for these targets with the DDR training code, the "u-boot-spl.kwb" image will be generated automatically. Users providing a special bin_hdr binary (binary.0) file can always add this binary file and generate the full firmware image by issuing the "make u-boot.kwb" command directly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Add d-cache invalidate before enabling the d-cacheStefan Roese2015-05-05-0/+3
| | | | | | | | | | This solves some RX problems that have been seen, when using the mvneta ethernet driver. The cache needs to be reset into a "clean" state before using it. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Remove coherency configurationStefan Roese2015-05-05-3/+0
| | | | | | | | | | We are not using the coherency feature in U-Boot at all. So lets remove this configuration from the mbus driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Change network init code to allow a more flexible setupStefan Roese2015-05-05-4/+16
| | | | | | | | | | | | | | | With the introduction of the Armada 38x support, its necessary to change the mvneta ethernet driver init call from always 4 times to a configurable value. Lets make this init call more flexible by moving the actually used devices to the config header. Additionally this patch takes care of the slightly different base addresses for the ethernet controllers on A38x. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm: mvebu: Add basic Armada 38x supportStefan Roese2015-05-05-16/+73
| | | | | | | | | | | | | | | | This patch adds support for the Marvell Armada 38x SoC family. Supported peripherals are: - UART - Ethernet (mvneta) - I2C - SPI (including SPI NOR flash) Tested on Marvell DB-88F6820-GP evaluation board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Move CONFIG_SPL_LDSCRIPT to common headerStefan Roese2015-05-05-0/+5
| | | | | | | | | This way, new MVEBU boards don't need to specifiy the common location for the SPL linker script. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Only define MV88F78X60 for Armada XPStefan Roese2015-05-05-1/+3
| | | | | | | | | | This define is used by the DDR training code for Armada XP. With the upcoming addition of Armada 38x support, lets only define it for Armada XP in this common header. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Remove unreferenced defineStefan Roese2015-05-05-3/+0
| | | | | | | | MAX_MVNETA_DEVS is not used anywhere in U-Boot. So lets remove it. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Change header macros from ARMADA_XP to MVEBUStefan Roese2015-05-05-10/+10
| | | | | | | | | Since these files will be used for other MVEBU SoC's, lets reflect this in the headers marcos as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: mvebu: Move mvebu-common into mach-mvebuStefan Roese2015-05-05-1/+2977
| | | | | | | | | | Now that the mach-mvebu directory exists and is used by Armada XP we can move the mvebu-common files into this directory as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: armada-xp: Move SoC headers to mach-mvebu/include/machStefan Roese2015-05-05-0/+266
| | | | | | | | | | | | | | Move arch/arm/include/asm/arch-armada-xp/* -> arch/arm/mach-mvebu/include/mach/* Additionally the SYS_SOC is renamed from "armada-xp" to "mvebu". With this change all these files can better be shared with other, newer Mavell MVEBU SoC's. Like the upcoming Armada 38x support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* arm: armada-xp: Move SoC sources to mach-mvebuStefan Roese2015-05-05-0/+301
Move arch/arm/cpu/armv7armada-xp/* -> arch/arm/mach-mvebu/* Since this platform will be extended to support other Marvell SoC's as well, lets rename it directly to mvebu. This will be used by the upcoming Armada 38x suport (A38x). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
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