| Commit message (Collapse) | Author | Age | Lines | |
|---|---|---|---|---|
| * | ARM: at91: sama5d2: configure the L2 cache memory | Samuel Mescoff | 2016-02-18 | -0/+1 |
| | | | | | | | | | | | | | | The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache memory. Make sure it is configured as a L2 cache memory when booting from a SPL image. Based on the commit b5ea95ef2b5b from the at91bootstrap repository. Signed-off-by: Samuel Mescoff <samuel.mescoff@mobile-devices.fr> Reviewed-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> | |||
| * | ARM: at91: move SoC headers to mach-at91/include/mach | Masahiro Yamada | 2015-02-21 | -0/+38 |
| Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> | ||||
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index : arm-boot/u-boot-imx.git | |
| U-boot NXP imx6 | git@iatec.biz |
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