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* ARM: cache: Move the cp15 CR register read before flushing the cache.SRICHARAN R2012-07-07-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following is the cleanup sequence in arch/arm/cpu/armv7/cpu.c int cleanup_before_linux(void) { ... ... dcache_disable(); v7_outer_cache_disable(); invalidate_dcache_all(); } 1) invalidate_dcache_all call expects that all the caches has been flushed, invalidated and there are no dirty entries prior to its execution. In the above sequence dcache_disable() flushes, invalidates the caches and turns off the mmu. But after it cleanups the cache and before the mmu is disabled there is a cp_delay() function which has STR instruction. On certain cores like the cortex-a15, cache hit and a write can happen to a cache line even when the dcache is disabled. So the above mentioned STR instruction creates a dirty entry after cleaning. The mmu gets disabled after this. 2) invalidate_dcache_all invalidates the cache lines. Again on cores like cortex-a15, invalidate instruction flushes the dirty line as well. So some times the dirty line from sequence 1 can corrupt the memory resulting in a crash. Fixing this by moving the get_cr() and cp_delay() calls before cleaning up the cache, thus avoiding the dirty entry. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* arm: minor fixes for cache and mmu handlingAneesh V2011-07-04-2/+7
| | | | | | | | | | | 1. make sure that page table setup is not done multiple times 2. flush_dcache_all() is more appropriate while disabling cache than a range flush on the entire memory(flush_cache()) Provide a default implementation for flush_dcache_all() for backward compatibility and to avoid build issues. Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: integrate cache maintenance supportAneesh V2011-07-04-0/+7
| | | | | | | | | | - Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: rename cache related CONFIG flagsAneesh V2011-07-04-3/+3
| | | | | | | | | | | | | | | | Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message
* Drop support for CONFIG_SYS_ARM_WITHOUT_RELOCWolfgang Denk2010-10-29-19/+0
| | | | | | | | | | | | | | | | When this define was introduced, the idea was to provide a soft migration path for ARM boards to get adapted to the new relocation support. However, other recent changes led to a different implementation (ELF relocation), where this no longer works. By now CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it actually hurts because it obfuscates the actual code by sprinkling it with lots of dead and non-working debris. So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC. Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* ARM: add relocation supportHeiko Schocher2010-09-19-3/+34
| | | | | | | | | | | | | | | | | | | !! This breaks support for all arm boards !! To compile in old style, you must define CONFIG_SYS_ARM_WITHOUT_RELOC or you can compile with "CONFIG_SYS_ARM_WITHOUT_RELOC=1 ./MAKEALL board" !! This define will be removed soon, so convert your board to use relocation support Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de> Fix boot from NAND for non-ARM systems Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: cp15: setup mmu and enable dcacheHeiko Schocher2010-09-19-0/+51
| | | | | | | | | | | | | | | | | | | | | This has been tested on at91sam9263 and STN8815. Again, I didn't check if it has bad effects on non-arm926 cores. Initially I had a "done" bit to only set up page tables at the beginning. However, since the aligmnent requirement was for the whole object file, this extra integer tool 16kB in BSS, so I chose to remove it. Also, note not all boards use PHYS_SDRAM, but it looks like it's the most used name (more than CONFIG_SYS_DRAM_BASE for example). Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Heiko Schocher <hs@denx.de>
* Move lib_$ARCH directories to arch/$ARCH/libPeter Tyser2010-04-13-0/+120
Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk This change is intended to clean up the top-level directory structure and more closely mimic Linux's directory organization. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>