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* am33xx: Move the call to ddr_pll_config, make it take the frequencyTom Rini2012-09-01-0/+1
| | | | | | | | Depending on if we have DDR2 or DDR3 on the board we will need to call ddr_pll_config with a different value. This call can be delayed slightly to the point where we know which type of memory we have. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Pass to config_ddr the type of memory that is connectedTom Rini2012-09-01-2/+8
| | | | | | | | | We need to pass in the type of memory that is connected to the board. The only reliable way to do this is to know what type of board we are running on (which later will be knowable in s_init()). For now, pass in the value of DDR2. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Make config_cmd_ctrl / config_ddr_data take const structsTom Rini2012-09-01-2/+2
| | | | | | | | | Rework the EMIF4/DDR code slightly to setup the structs that config_cmd_ctrl and config_ddr_data take to be setup at compile time and mark them as const. This lets us simplify the calling path slightly as well as making it easier to deal with DDR3. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Convert to using <asm/emif.h> to describe the EMIFTom Rini2012-09-01-27/+0
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Remove DMM_BASE defineTom Rini2012-09-01-1/+0
| | | | | | The am33xx does not have a DMM, so don't define the base. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: mem: Add Numonyx OneNAND 200MHz timing informationJavier Martinez Canillas2012-09-01-0/+29
| | | | Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
* am33xx: pin mux defintions for CPSW switchChandan Nath2012-09-01-0/+2
| | | | | | | | | This patch adds pin mux settings for CPSW switch found on TI AM335X based boards (MII and RGMII modes). Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split pinmux into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx: CPSW init and definitionsChandan Nath2012-09-01-0/+16
| | | | | | | | | This patch adds platform-specific initialization for CPSW switch on TI AM33XX SoCs. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split init out of original patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* arm/davinci/da850: add uart0 pinmuxMikhail Kshevetskiy2012-09-01-0/+2
| | | | | Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
* arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138Mikhail Kshevetskiy2012-09-01-0/+1
| | | | | | | | | follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Acked-by: Christian Riesch <christian.riesch@omicron.at> Tested-by: Christian Riesch <christian.riesch@omicron.at>
* da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar2012-09-01-0/+4
| | | | | | | | | This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* omap: am33xx: enable gpio supportSteve Sakoman2012-09-01-0/+49
| | | | | | | | | | | This patch uses the code in omap-common to support gpio modules 1-3 on am33xx based boards. It adds base address and register definitions, enables clocks to the modules, and enables building the common gpio code for CONFIG_AM33XX as well as CONFIG_OMAP Signed-off-by: Steve Sakoman <steve@sakoman.com>
* global_data: unify global flag definesMike Frysinger2012-08-09-13/+1
| | | | | | | All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* I2C: Move struct s3c24x0_i2c to a common place.Rajeshwari Shinde2012-07-31-10/+0
| | | | | | | | | | struct s3c24x0_i2c is being moved to common local header file so that the same can be used by s3c series and exynos series SoCs. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* EXYNOS: PINMUX: Add pinmux support for I2CRajeshwari Shinde2012-07-31-0/+8
| | | | | | | This patch adds pinmux code for I2C. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* EXYNOS5: define EXYNOS5_I2C_SPACINGRajeshwari Shinde2012-07-31-0/+2
| | | | | | | | This patch defined EXYNOS5_I2C_SPACING used to calculate I2C channel base address. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* EXYNOS: Add I2C base address.Rajeshwari Shinde2012-07-31-0/+3
| | | | | | | | This patch adds the base address for I2C. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* EXYNOS: CLK: Add i2c clockRajeshwari Shinde2012-07-31-0/+1
| | | | | | | | | This adds i2c clock information for EXYNOS5. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* imx-common: add i2c.c for bus recovery supportTroy Kisky2012-07-31-0/+44
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* i.mx53: add definition for I2C3_BASE_ADDRTroy Kisky2012-07-31-0/+1
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky2012-07-31-1/+1
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mx6: Make pad name macro consistent with the datasheetAshok2012-07-20-2/+2
| | | | | | | | Use the same name as defined in the datasheet. DSP_CLK -> DISP_CLK Signed-off-by: Ashok Kumar Reddy Kourla <ashokkourla2000@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk2012-07-18-2/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.denx.de/u-boot-video: ipu_common: Add ldb_clk for use in parenting the pixel clock ipu_common: Do not hardcode the ipu_clk frequency ipu_common: Rename MXC_CCM_BASE ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53 ipu_common: Only apply the erratum to MX51 video: Rename CONFIG_VIDEO_MX5 mx6: Allow mx6 to access the IPUv3 registers common lcd: minor coding style changes Signed-off-by: Wolfgang Denk <wd@denx.de>
| * mx6: Allow mx6 to access the IPUv3 registersFabio Estevam2012-07-10-2/+3
| | | | | | | | | | | | Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mxc_i2c: specify i2c base address in config fileTroy Kisky2012-07-11-1/+8
|/ | | | | | | | | The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-07-10-0/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: tegra: define fdt_load/fdt_high variables tegra: enable bootz command tegra: usb: Fix device enumeration problem of USB1 tegra: trimslice: set up serial flash pinmux tegra: add pin_mux_spi() board initialization function tegra: add GMC/GMD funcmux entry for SFLASH tegra: bootcmd: start USB only when needed tegra: bootcmd enhancements tegra: add enterrcm command tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG Add env vars describing U-Boot target board tegra: usb: fix wrong error check tegra: add ULPI on USB2 funcmux entry tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches tegra: Add Tamonten Evaluation Carrier support tegra: Use SD write-protect GPIO on Tamonten tegra: Implement gpio_early_init() on Tamonten tegra: Allow boards to perform early GPIO setup tegra: plutux: Add device tree support tegra: medcom: Add device tree support tegra: Rework Tamonten support beagle: add eeprom expansion board info for bct brettl4 Signed-off-by: Wolfgang Denk <wd@denx.de>
| * tegra: usb: Fix device enumeration problem of USB1Jim Lin2012-07-09-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: add GMC/GMD funcmux entry for SFLASHStephen Warren2012-07-09-0/+3
| | | | | | | | | | | | | | This is used on TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: add ULPI on USB2 funcmux entryLucas Stach2012-07-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | This is needed as a prerequisite for Tegra USB ULPI support within U-Boot. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | EXYNOS5: USB: Fix incorrect USB base addressesRajeshwari Shinde2012-07-09-2/+2
| | | | | | | | | | | | | | | | | | This patch corrects the base addresses for USB_PHY and USB_OTG. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* | EXYNOS: Add power Enable/Disable for USB-EHCIRajeshwari Shinde2012-07-09-0/+4
| | | | | | | | | | | | | | | | | | This patch adds functions to enable/disable the power of USB host controller for EXYNOS5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | USB: EXYNOS: Set USB 2.0 HOST Link modeRajeshwari Shinde2012-07-09-0/+3
| | | | | | | | | | | | | | This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | EXYNOS5: Add structure for PMU registersRajeshwari Shinde2012-07-09-0/+622
| | | | | | | | | | | | | | | | This patch adds power mananagement registers structure for exynos5 SoC. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* | EXYNOS5: Fix system register structureRajeshwari Shinde2012-07-09-0/+1
| | | | | | | | | | | | | | | | | | This patch corrects the SYSREG structure. We have removed the sysreg.h added in the previous patchset version as the sysreg structure is already defined in system.h. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* | USB: EXYNOS: Incorporate EHCI review commentsRajeshwari Shinde2012-07-09-5/+8
|/ | | | | | | This patch incorates the review comments given by Minkyu Kang for EHCI support on EXYNOS Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* ARM: introduce arch_early_init_r()Fabio Estevam2012-07-07-0/+1
| | | | | | | Introduce arch_early_init_r() function, which can be useful for doing early initialization after relocation has happened. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* SPL: ARM: spear: Add SPL support for SPEAr600 platformStefan Roese2012-07-07-20/+260
| | | | | | | | | | | | This patch adds SPL support for SPEAr600. Currently only SNOR (Serial NOR) flash support is included. Other boot devices (NAND, MMC, USB ...) may be added with later patches. Tested on the STM SPEAr600 evaluation and x600 SPEAr600 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
* GPIO: Add SPEAr GPIO driverStefan Roese2012-07-07-0/+40
| | | | | | Tested on x600 (SPEAr600). Signed-off-by: Stefan Roese <sr@denx.de>
* cleanup/SPEAr: Remove unnecessary parenthesisAmit Virdi2012-07-07-2/+2
| | | | | | | | | In SPEAr configuration files, unnecessary paranthesis are used in some \#defines. Remove them as they serve no purpose Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: Correct SoC ID offset in misc configuration spaceShiraz Hashim2012-07-07-1/+1
| | | | | | | | | | SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: explicitly select clk src for UARTShiraz Hashim2012-07-07-0/+2
| | | | | | | | | | UART in u-boot intends to run on 48MHz clock supplied by USB PLL. Explicitly select the intended clock source. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: Add basic arch related support for SPEAr SoCsVipin KUMAR2012-07-07-0/+7
| | | | | | | | | | | Earlier, architecture specific init code was mixed with board initialization code in board/spear/... This patch updates architecture support for SPEAr in latest u-boot and prints the SoC information. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: Add macb driver support for spear310 and spear320Vipin KUMAR2012-07-07-0/+34
| | | | | | | | | | | SPEAr310 and SPEAr320 SoCs have an extra ethernet controller. The driver for this device is already supported by u-boot, so configuring board configuration file and defining base addresses etc to make use of the common driver Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: Configure network support for spear SoCsVipin KUMAR2012-07-07-0/+1
| | | | | | Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: Eliminate dependency on Xloader tableAmit Virdi2012-07-07-74/+0
| | | | | | | | | | Xloader table was used primarily to inform u-boot about the DDR size. However, now the ddr size is calculated at runtime which eliminates any need for the Xloader table. So removing this unnecessary code. Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Add support for SPEAr SMI driverVipin KUMAR2012-07-07-115/+0
| | | | | | | | | | | | | | SMI is the serial memory interface controller provided by ST. Earlier, a driver exists in the u-boot source code for the SMI IP. However, it was specific to spear platforms. This commit converts the same driver to a more generic driver. As a result, the driver files are renamed to st_smi.c and st_smi.h and moved into drivers/mtd folder for reusability by other platforms using smi controller peripheral. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd/NAND: Remove obsolete SPEAr specific NAND driversVipin KUMAR2012-07-07-57/+0
| | | | | | | | | | | Since, SPEAr platform uses generic FSMC driver now, so spear specific files drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are removed Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* SPEAr: Configure FSMC driver for NAND interfaceVipin KUMAR2012-07-07-4/+4
| | | | | | | | | | | Since FSMC is a standard IP and it supports different memory interfaces, it is supported independent of spear platform and spear is configured to use that driver for interfacing with the NAND device Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* ARM: OMAP4+: Move external phy initialisations to arch specific place.SRICHARAN R2012-07-07-0/+2
| | | | | | | | | | The external phy is present in the case OMAP5 soc is currently configured in emif-common.c. This results in having dummy structures for those Socs which do not have a external phy. So by having a weak function in emif-common and overriding it in OMAP5, avoids the use of dummy structures. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* omap: am33xx: accomodate input clocks other than 24 MhzSteve Sakoman2012-07-07-5/+5
| | | | | | | | | The PLL setup values currently assume a 24 Mhz input clock. This patch uses V_OSCK from the board config file to support boards with different input clock rates. Signed-off-by: Steve Sakoman <steve@sakoman.com>
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