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* sun4i: Rename dram_clk_cfg to dram_clk_gateHans de Goede2014-11-25-1/+1
| | | | | | | | | The data sheet just calls it DRAM_CLK_REG, and on sun6i we've both a dram_clk_cfg and dram_clk_gate, and the sun4i reg matches dram_clk_gate on sun6i, so name it the same on sun4i. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-24-10/+47
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| * arm: mx6: introduce disable_sata_clockNikita Kiryanov2014-11-24-0/+1
| | | | | | | | | | | | | | Implement disable_sata_clock for mx6 SoCs. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
| * mx6: clock: Add thermal clock enable functionNitin Garg2014-11-21-0/+1
| | | | | | | | | | | | | | | | Add api to check and enable pll3 as required for thermal sensor driver. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * mx6: add weim registersFabio Estevam2014-11-20-0/+37
| | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: consolidate set_chipselect_size functionFabio Estevam2014-11-20-10/+8
| | | | | | | | | | | | | | | | | | | | Move MX5 specific set_chipselect_size function into generic i.MX part, such that MX6 based boards are able to use this function as well. While doing this the iomuxc gpr member needed to be consolidated between MX5 and MX6. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2014-11-24-1/+24
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial-uclass.c Signed-off-by: Tom Rini <trini@ti.com>
| * | dm: at91: Add driver model support for the serial driverSimon Glass2014-11-21-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: at91: Add platform data for GPIO on at91sam9260-based boardsSimon Glass2014-11-21-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | These boards all have the same GPIO arrangement, so add some common platform data that can be used by all boards. Remove the configs which are no longer required. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: at91: Add driver model support for atmel GPIO driverSimon Glass2014-11-21-0/+6
| |/ | | | | | | | | | | | | Modify this driver to support driver model, with platform data required to determine the GPIOs that it controls. Signed-off-by: Simon Glass <sjg@chromium.org>
* | ARM: remove CONFIG_ARM926EJS definesMasahiro Yamada2014-11-20-10/+0
| | | | | | | | | | | | | | | | | | | | CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). This commit removes all the defines of CONFIG_ARM926EJS and replaces the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: remove CONFIG_ARM920T definesMasahiro Yamada2014-11-20-1/+0
| | | | | | | | | | | | | | | | | | | | CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). This commit removes all the defines of CONFIG_ARM920T and replaces the only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: remove CONFIG_ARMV7 definesMasahiro Yamada2014-11-20-1/+0
|/ | | | | | | | Some (not all) of ARMv7 boards define CONFIG_ARMV7, which is useless. Besides, it is never referenced. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: atmel: add sama5d4ek board supportBo Shen2014-11-17-8/+256
| | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm, spl, at91: add at91sam9260 and at91sam9g45 spl supportHeiko Schocher2014-11-17-1/+34
| | | | | | | | | | | add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [adopt Bo's change in spl.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE defineHeiko Schocher2014-11-17-0/+1
| | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2014-11-17-1/+532
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| * arm: rmobile: Move rcar-i2c of the address defined to common headerNobuhiro Iwamatsu2014-11-10-0/+6
| | | | | | | | | | | | | | | | | | R-Car SoCs of rmobile have same IP of rcar-i2c, and have same address. This moves rcar-i2c of the address defined to rcar-base.h as common header of R-Car SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Move sh-i2c of the address defined to common headerNobuhiro Iwamatsu2014-11-10-0/+23
| | | | | | | | | | | | | | | | | | R-Car SoCs of rmobile have same IP of sh-i2c, and have same address. This moves sh-i2c of the address defined to rcar-base.h as common header of R-Car SoCs, and headers of each SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Add support R8A7793Nobuhiro Iwamatsu2014-11-10-1/+503
| | | | | | | | | | | | | | | | Renesas R8A7793 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2014-11-13-170/+814
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| * | sun6i: ehci: Add sun6i ehci supportHans de Goede2014-11-13-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the 2 ehci controllers found on the sun6i (A31) soc. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Marek Vasut <marex@denx.de>
| * | sun6i: Add dram initialization codeHans de Goede2014-11-13-3/+368
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add full support for dram initialization, using a fixed clock and autodetection of the memory organization (numbers of channels, bus-width, etc.). This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, extended with extra initialization sequences and the autodetect algorithm from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun4i: Rename dram files to dram_sun4i.xHans de Goede2014-11-13-165/+184
| | | | | | | | | | | | | | | | | | | | | In preparation for adding sun6i dram support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add cpucfg register definitionsHans de Goede2014-11-13-1/+69
| | | | | | | | | | | | | | | | | | | | | Not used atm, for future use (e.g. PSCI). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-13-1/+1
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| * | | ARM: cache-cp15: Use more accurate typesThierry Reding2014-11-12-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | size_t is the canonical type to represent variables that contain a size. Use it instead of signed integer. Physical addresses can be larger than 32-bit, so use a more appropriate type for them as well. phys_addr_t is a type that is 32-bit on systems that use 32-bit addresses and 64-bit if the system is 64-bit or uses a form of physical address extension to use a larger address space on 32-bit systems. Using these types the same API can be implemented on a wider range of systems. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-11-0/+13
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| * | arm: socfpga: Add socfpga_spim_enable() to reset_manager.cStefan Roese2014-11-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates targetStefan Roese2014-11-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the latest DT sources for socfpga from the current Linux kernel. And enables CONFIG_OF_CONTROL for the new build target "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT support. Until this patch, the only SoCFPGA U-Boot target in mainline is "socfpga_cyclone5". This build target is not (yet) changed to support DT. So nothing changes for this target. Even though the long-term goal should be to move all SoCFPGA targets over to DT. One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport. Note that the image with the dtb embedded is u-boot-dtb.img. This needs to be used now for those DT enabled boards instead of u-boot.img. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org>
* | | ARM: UniPhier: add set_pinsel macro for use in assembly codeMasahiro Yamada2014-11-12-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | The function sg_set_pinsel is useful for switching I/O pins but it can be only used in C code. This commit adds a simple macro that is available in asm code. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | usb: UniPhier: add UniPhier on-chip EHCI host driver supportMasahiro Yamada2014-11-12-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support EHCI host driver used on Panasonic UniPhier platform. Since Device Tree is not supported on UniPhier yet, the base address of USB cores are passed from board files (platdevice.c). TODO for me: Move the base address to device trees. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
* | | ARM: UniPhier: add MIO register fileMasahiro Yamada2014-11-12-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds register defines of MIO (Media I/O) block of UniPhier platform. This file is necessary to control the reset signals of the USB cores. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-10-1/+53
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| * | | gic: fixed compilation error in GICv2 wait for interrupt macroYehuda Yitschak2014-10-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | a hexadicemal value was missing the "0x" prefix which caused assembler error Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
| * | | arm: debug: replace license blocks with SPDXMasahiro Yamada2014-10-26-3/+1
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | arm: debug: import debug files from Linux 3.16Masahiro Yamada2014-10-26-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not have arch/arm/kernel, include/uapi directories, This commit copies files as follows: Location in Linux -> Location in U-Boot arch/arm/kernel/debug.S -> arch/arm/lib/debug.S arch/arm/include/debug/8250.S -> arch/arm/include/debug/8250.S include/uapi/linux/serial_reg.h -> include/linux/serial_reg.h Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | Merge git://git.denx.de/u-boot-tiTom Rini2014-11-07-6/+11
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| * | | am335x: make get_board_rev() function weakIgor Grinberg2014-11-06-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current get_board_rev() function returns a hard coded value which is obviously incorrect for the majority of boards. Allow boards to provide a correct implementation by making this function weak. In addition open code the trivial and useless BOARD_REV_ID define and adjust the comment. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com>
| * | | net: keystone_net: add Keystone2 K2L SoC supportKhoronzhuk, Ivan2014-11-05-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Keystone2 Lamar SoC uses the same keystone net driver. This patch adds opportunity to use it by K2L SoCs. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | net: keystone_serdes: add keystone K2L SoC supportKhoronzhuk, Ivan2014-11-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 Lamar SoC uses the same keystone SerDes driver. All Keystone2 EVM boards currently use SerDes driver, so move CONFIG_TI_KEYSTONE_SERDES to common configuration file. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | ARM: keystone2: keysonte_nav: add support for K2L SoCKhoronzhuk, Ivan2014-11-05-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Keystone2 Lamar SoC uses the same keystone navigator. Move queue numbers to common hardware file, as all Keystone2 SoCs have the same ones. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | | | Merge branch 'rmobile' of git://www.denx.de/git/u-boot-shTom Rini2014-11-05-0/+2
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| * | | | arm: rmobile: lager: Fix change of the CPU frequencyNobuhiro Iwamatsu2014-11-04-0/+2
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change of the CPU frequency is waited for until PLL0ST of the PLLECR is set to 1. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-05-5/+31
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| * | | imx: mx6 sabreauto: Add board support for USB EHCIYe.Li2014-11-03-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6 sabreauto board, there are two USB ports: 0: OTG 1: HOST The EHCI driver is enabled for this board, but the IOMUX and VBUS power control is not implemented, which cause both USB port failed to work. This patch fix the problem by adding the board support codes. Since the power control uses the GPIO pin from port expander MAX7310, the PCA953X driver is enabled for accessing the MAX7310. The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting its daisy chain. Add a new function "imx_iomux_set_gpr_register" to handle GPR register setting. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | imx: mx6sl: Add IOMUX setting for USDHC1-3Ye.Li2014-11-03-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Set the USDHC1-3 IOMUX settings which are used for mx6slevk board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | imx: mx6sl: Add perclk_clk_sel bit define in CCMYe.Li2014-11-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li <B37916@freescale.com>
generated by cgit v1.1 at 2024-10-20 22:26:41 +0000