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* omap4: add omap4460 revision detectionAneesh V2011-08-03-0/+2
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: add MMC and FAT support to SPLAneesh V2011-08-03-0/+25
| | | | | | | | | | | | | | - Add MMC raw and FAT mode boot support for OMAP - Provide a means by which parameters passed by ROM-code can be saved in u-boot. - Save boot mode related information passed by OMAP4 ROM-code and use it to determine where to load the u-boot from - Assumes that the image has a mkimage header. Gets the payload size and load address from this header. If the header is not detected assume u-boot.bin as payload Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: add basic SPL supportAneesh V2011-08-03-0/+3
| | | | | | | | | | | | | - Provide alternate implementations of board_init_f() board_init_r() for OMAP spl. - Provide linker script - Initialize global data - Add serial console support - Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move it to board config header from config.mk Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: calculate EMIF register valuesAneesh V2011-08-03-6/+14
| | | | | | | | | | | | | | Calculate EMIF register values based on AC timing parameters from the SDRAM datasheet and the DDR frequency rather than using the hard-coded values. For a new board the user doen't have to go through the tedious process of calculating the register values. Instead, just provide the AC timings from the device data sheet as input and the driver will automatically calculate the register values. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add sdram init supportAneesh V2011-08-03-4/+1036
| | | | | | | Add support for the SDRAM controller (EMIF). Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add clock supportAneesh V2011-08-03-0/+675
| | | | | | | | | | | | | | Add support for: 1. DPLL locking 2. Initialization of clock domains and clock modules 3. Setting up the right voltage on voltage rails This work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add OMAP4430 revision checkAneesh V2011-08-03-8/+33
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: cleanup pin mux dataAneesh V2011-08-03-1/+3
| | | | | | | | | | | | | - separate mux settings into essential and non essential parts - essential part is board independent as of now(so move it to SoC directory). Will help in having single SPL for all boards. - Non-essential part(the pins not essential for u-boot to function) need to be phased out eventually. - Correct mux data by aligning to the latest settings in x-loader Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: utility function to identify the context of hw initAneesh V2011-08-03-1/+82
| | | | | | | | | | | | | | | | The basic hardware init of OMAP4(s_init()) can happen in 4 different contexts: 1. SPL running from SRAM 2. U-Boot running from FLASH 3. Non-XIP U-Boot loaded to SDRAM by SPL 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the Configuration Header feature What level of hw initialization gets done depends on this context. Add a utility function to find this context. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: fix LPSC constantsLaurence Withers2011-08-03-12/+31
| | | | | | | | | | Some of the LPSC constants were incorrect, and some were missing. This commit fixes the incorrect constants (which were not used anywhere in the tree) and adds all constants for both DA830 and DA850, as per the TI datasheets. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: switch an enum to defines for consistencyLaurence Withers2011-08-03-41/+40
| | | | | | | | | | There are two main sets of LPSC constants, depending on the processor family. The DA8xx constants were given in an enum whereas the non-DA8xx constants were preprocessor defines. This commit switches the DA8xx constants to defines for consistency. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: add MMC/SD controller addressesLaurence Withers2011-08-03-0/+2
| | | | | Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci EMAC: declare function for all DA8xx CPUsLaurence Withers2011-08-03-1/+1
| | | | | | | | | | | | The function davinci_emac_mii_mode_sel() is defined in board/davinci/common/misc.c for any DA8xx CPU which has CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board. This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC is enabled. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: add generic GPIO driverLaurence Withers2011-08-03-0/+8
| | | | | | | | | | | Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface specified in <asm/gpio.h> . The driver has support for both manipulating GPIO pins as well as automatically configuring the pin multiplexor registers to set the pin function to GPIO. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci: rename gpio_defs.h to gpio.hLaurence Withers2011-08-03-0/+0
| | | | | | | | | In preparation for a generic GPIO driver for the DA8xx processors, rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files which include it. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Unify timer_init() and cpu_init() prototypesWolfgang Denk2011-08-01-3/+0
| | | | | | | | | | Clean up some duplicated prototype declarations. Get rid of now useless AVR32 initcalls.h file. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Graeme Russ <graeme.russ@gmail.com>
* ARM: fix error: conflicting types for 'setenv'seedshope2011-08-01-8/+0
| | | | | | | | | Also remove bogus comment. Signed-off-by: Zhong hongbo <bocui107@gmail.com> Changed commit message Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr>
* cosmetic: spell fixes etc.Michael Jones2011-07-28-1/+1
| | | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2011-07-19-0/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mmc: mmc: rescan fails on empty slot AT91:mmc:fix multiple read/write error mmc: Access mode validation for eMMC cards > 2 GiB mmc: sh_mmcif: add support for Renesas MMCIF mmc: fix the condition for MMC version 4 MMC: add marvell sdhci driver MMC: add sdhci generic framework MMC: add erase function to both mmc and sd MMC: unify mmc read and write operation mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
| * mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3Tom Warren2011-07-15-0/+11
| | | | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Andy Fleming <afleming@freescale.com>
* | MX31: Cleanup clock functionStefano Babic2011-07-18-2/+9
| | | | | | | | | | | | | | The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | arm: add __ilog2 functionRob Herring2011-07-16-0/+5
| | | | | | | | | | | | | | Add __ilog2 function for ARM. Needed for ahci.c Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Albert ARIBAUD <albert.aribaud@free.fr>
* | MX27: Update to autogenerated asm-offsets.hStefano Babic2011-07-14-16/+0
| | | | | | | | | | | | | | On i.MX27, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
* | MX5: Update to autogenerated asm-offsets.hStefano Babic2011-07-14-55/+18
| | | | | | | | | | | | | | On i.MX5, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
* | imx: Add support for zmx25 boardMatthias Weisser2011-07-14-0/+64
| | | | | | | | | | | | | | zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an optional NAND flash. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* | imx: Make imx25 compatible to mxc_gpio driver and fix in tx25Matthias Weisser2011-07-14-2/+8
| | | | | | | | | | | | | | Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25 board. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* | imx: Add auto generation of asm-offsets.h for imx25Matthias Weisser2011-07-14-0/+39
| | | | | | | | | | | | | | Offsets to registers may be needed in asm code. This patch adds automated generation of these offsets form C structures. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* | imx: Add support for USB EHCI on imx25Matthias Weisser2011-07-14-1/+1
| | | | | | | | | | | | | | Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* | mx27: Make the UART port number explicitFabio Estevam2011-07-14-1/+1
|/ | | | | | | | mx27_uart_init_pins does the IOMUX setting for UART1 port. Change the function name to make the UART port number explicit. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSIHolger Brunck2011-07-04-0/+2
| | | | | | | | | | | Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI on in this case. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* Fix compiler error for cpu at91sam9, if lowlevel init is enabledJens Scharsig2011-07-04-1/+1
| | | | | | | * Fix compiler error for cpu at91sam9, if lowlevel init is enabled * use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC Signed-off-by: Jens Scharsig
* arm920t/at91: add at91rm9200_devices.cAndreas Bießmann2011-07-04-2/+7
| | | | | | | This is a copy of arm926ejs/at91 api for perpherial initialisation. At the moment we just need the usart part of the api. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: use new clock.c featuresAndreas Bießmann2011-07-04-0/+1
| | | | | | | | | This patch enables the new clock features from arm920t/at91/clock.c. This is an required step to get at91rm9200_usart replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Jens Scharsig <js_at_ng@scharsoft.de> Cc: Eric Bénard <eric@eukrea.com>
* arm920t/at91: add clock.cAndreas Bießmann2011-07-04-6/+36
| | | | | | | This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The arm926ejs specialities are removed from arm920t version and vice versa. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91rm9200.h: fix ATMEL_PMX_AA_TXD2Andreas Bießmann2011-07-04-1/+1
| | | | | | | | | This patch sets the ATMEL_PMX_AA_TXD2 to the correct value. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Jens Scharsig <js_at_ng@scharsoft.de> CC: eric@eukrea.com Acked-by: Eric Bénard <eric@eukrea.com>
* MX5: Introduce a function for setting the chip select sizeFabio Estevam2011-07-04-1/+6
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Add iomux structureFabio Estevam2011-07-04-0/+23
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Make the weim structure completeFabio Estevam2011-07-04-6/+125
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* GPIO: Tegra2: add GPIO driver for Tegra2Tom Warren2011-07-04-10/+278
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* armv7: adapt s5pc1xx to the new cache maintenance frameworkAneesh V2011-07-04-3/+0
| | | | | | adapt s5pc1xx to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap3 to the new cache maintenance frameworkAneesh V2011-07-04-3/+27
| | | | | | adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap4 to the new cache maintenance frameworkAneesh V2011-07-04-1/+1
| | | | | | adapt omap4 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: add PL310 support to u-bootAneesh V2011-07-04-0/+73
| | | | | | | | | | | | | PL310 is the L2$ controller from ARM used in many SoCs including the Cortex-A9 based OMAP4430 Add support for some of the key PL310 operations - Invalidate all - Invalidate range - Flush(clean & invalidate) all - Flush range Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: rename cache related CONFIG flagsAneesh V2011-07-04-1/+1
| | | | | | | | | | | | | | | | Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message
* armv7: cache maintenance operations for armv7Aneesh V2011-07-04-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | - Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V <aneesh@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-06-23-129/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: run arm_pci_init after relocation IXP42x PCI rewrite update/fix PDNB3 board update/fix IXDP425 / IXDPG425 boards add dvlhost (dLAN 200 AV Wireless G) board IXP NPE: add support for fixed-speed MII ports update/fix AcTux4 board update/fix AcTux3 board update/fix AcTux2 board update/fix AcTux1 board use -ffunction-sections / --gc-sections on IXP42x support CONFIG_SYS_LDSCRIPT on ARM fix "depend" target in npe directory Fix IXP code to work after relocation was added trigger hardware watchdog in IXP42x serial driver add support for IXP42x Rev. B1 and newer add XScale sub architecture (IXP/PXA) to maintainer list Conflicts: arch/arm/lib/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * IXP42x PCI rewriteMichael Schwingen2011-06-23-126/+4
| | | | | | | | | | | | | | | | clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc. code and use u-boot's PCI infrastructure instead. Move board-specific PCI setup code (clock/reset) to board directory. Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * Fix IXP code to work after relocation was addedMichael Schwingen2011-06-23-3/+5
| | | | | | | | | | | | | | - jump to real flash location after reset before turning off flash mirror - fix timer system to use HZ == 1000, remove broken interrupt-based code Signed-off-by: Michael Schwingen <michael@schwingen.org>
* | ARM: drop unsupported 'trab' boardWolfgang Denk2011-06-22-3/+0
|/ | | | | | | | | | The 'trab' board configuration is broken, and there is nobody who is interested and willing to fix it. Drop it. This includes support for VFD displays which have always been used by this board only. Signed-off-by: Wolfgang Denk <wd@denx.de>
* include/asm/arch-at91: update several .h files to ATMEL_xxx name schemeEric Benard2011-06-21-28/+28
| | | | Signed-off-by: Eric Bénard <eric@eukrea.com>
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