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* arm: rmobile: Move sh-i2c of the address defined to common headerNobuhiro Iwamatsu2014-11-10-0/+23
| | | | | | | | | R-Car SoCs of rmobile have same IP of sh-i2c, and have same address. This moves sh-i2c of the address defined to rcar-base.h as common header of R-Car SoCs, and headers of each SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support R8A7793Nobuhiro Iwamatsu2014-11-10-1/+503
| | | | | | | | Renesas R8A7793 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* Merge branch 'rmobile' of git://www.denx.de/git/u-boot-shTom Rini2014-11-05-0/+2
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| * arm: rmobile: lager: Fix change of the CPU frequencyNobuhiro Iwamatsu2014-11-04-0/+2
| | | | | | | | | | | | | | | | | | The change of the CPU frequency is waited for until PLL0ST of the PLLECR is set to 1. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-05-5/+31
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| * | imx: mx6 sabreauto: Add board support for USB EHCIYe.Li2014-11-03-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6 sabreauto board, there are two USB ports: 0: OTG 1: HOST The EHCI driver is enabled for this board, but the IOMUX and VBUS power control is not implemented, which cause both USB port failed to work. This patch fix the problem by adding the board support codes. Since the power control uses the GPIO pin from port expander MAX7310, the PCA953X driver is enabled for accessing the MAX7310. The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting its daisy chain. Add a new function "imx_iomux_set_gpr_register" to handle GPR register setting. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx: mx6sl: Add IOMUX setting for USDHC1-3Ye.Li2014-11-03-0/+19
| | | | | | | | | | | | | | | | | | Set the USDHC1-3 IOMUX settings which are used for mx6slevk board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx: mx6sl: Add perclk_clk_sel bit define in CCMYe.Li2014-11-03-0/+2
| | | | | | | | | | | | | | | | | | | | | The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li <B37916@freescale.com>
| * | arm: arch-mx6: typo fixes in crm_regs.hSoeren Moch2014-10-30-4/+4
| | | | | | | | | | | | | | | | | | fix typos in video pll related register names and bit defines Signed-off-by: Soeren Moch <smoch@web.de>
| * | arm: imx6: fix typos in CCM_ANALOG_PLL_VIDEO_DENOM register nameAnatolij Gustschin2014-10-30-1/+1
| | | | | | | | | | | | | | | | | | Fix name for Video PLL denominator register. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | dm: sunxi: Add pinmux functions which take a bank parameterSimon Glass2014-11-05-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With driver model we will have access to a bank pointer, so we want to use it rather than converting back to a number, and then back to a bank pointer. Add functions to provide this feature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?IIan Campbell2014-11-05-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2014-11-04-35/+0
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| * | | Remove unused filesMasahiro Yamada2014-10-31-35/+0
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [1] arch/arm/include/asm/arch-at91/at91_shdwn.h The top9000 was the last board to use this header file. It was removed by commit d58a9451e733 (ppc/arm: zap EMK boards). [2] board/matrix_vision/common/* Some Matrix Vision boards were dropped by commit e7a565638a7a (powerpc: mpc83xx: remove board support for MERGERBOX and MVBLM7) and commit af55e35d3389 (powerpc: mpc5xxx: remove board support for MVBC_P and MVSMR). Since then these files have been unused. [3] include/usb/omap1510_udc.h The omap5912osk was the last board to use this header file. It was removed by commit 62d636aa2ac2 (omap: remove omap5912osk board support). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-By: Wolfgang Denk <wd@denx.de>
* | | exynos4/4x12: gpio: use gpio extra base addressesPrzemyslaw Marczak2014-10-30-20/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds extra gpio part addresses to exynos4 and exynos4x12_gpio_data arrays, which are required since the gpio enum lists are linear Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | exynos4/4x12: cpu: add extra gpio base addressesPrzemyslaw Marczak2014-10-30-0/+9
|/ / | | | | | | | | | | | | | | | | After remove the offsets in Exynos4/4x12 gpio enums, an additional gpio base addresses are required. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2014-10-27-0/+22
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| * ARM: i.MX video: declare displays and display_count publiclyEric Nelson2014-10-21-0/+5
| | | | | | | | | | | | | | | | Declare displays[] and display_count in imx-common/video.h to prevent "Should it be static?" messages when compiling board files with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * ARM: i.MX: provide declaration for board_spi_cs_gpioEric Nelson2014-10-21-0/+17
| | | | | | | | | | | | | | | | Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-10-27-311/+885
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| * | omap3/am33xx: mux: fix several checkpatch issuesIgor Grinberg2014-10-23-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following checkpatch issues: CHECK: No space is necessary after a cast \#39: FILE: arch/arm/include/asm/arch-am33xx/mux.h:39: +#define PAD_CTRL_BASE 0x800 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \ CHECK: Avoid CamelCase: <CONTROL_PADCONF_JTAG_nTRST> \#284: FILE: arch/arm/include/asm/arch-omap3/mux.h:284: +#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C ERROR: space required after that ',' (ctx:VxV) \#446: FILE: arch/arm/include/asm/arch-omap3/mux.h:446: +#define MUX_VAL(OFFSET,VALUE)\ ^ Cc: Raphael Assenat <raph@8d.com> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Nishanth Menon <nm@ti.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefan Roese <sr@denx.de>
| * | keystone2: ecc: add ddr3 error detection and correction supportVitaly Andrianov2014-10-23-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DDR3 ECC support to enable ECC in the DDR3 EMIF controller for Keystone II devices. By default, ECC will only be enabled if RMW is supported in the DDR EMIF controller. The entire DDR memory will be scrubbed to zero using an EDMA channel after ECC is enabled and before u-boot is re-located to DDR memory. An ecc_test environment variable is added for ECC testing. If ecc_test is set to 0, a detection of 2-bit error will reset the device, if ecc_test is set to 1, 2-bit error detection will not reset the device, user can still boot the kernel to check the ECC error handling in kernel. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: keystone: msmc: extend functionality of SESVitaly Andrianov2014-10-23-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions to set/get SES PMAX values of Pivilege ID pair. Also add msmc module definitions. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | dma: ti-edma3: introduce edma3 driverKhoronzhuk, Ivan2014-10-23-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EDMA3 controller’s primary purpose is to service data transfers that you program between two memory-mapped slave endpoints on the device. Typical usage includes, but is not limited to the following: - Servicing software-driven paging transfers (e.g., transfers from external memory, such as SDRAM to internal device memory, such as DSP L2 SRAM) - Servicing event-driven peripherals, such as a serial port - Performing sorting or sub-frame extraction of various data structures - Offloading data transfers from the main device DSP(s) - See the device-specific data manual for specific peripherals that are accessible via the EDMA3 controller Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: keystone: clock: add support for K2E SoCsKhoronzhuk, Ivan2014-10-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | For K2E and K2L SoCs clock output from PASS PLL has to be enabled after NETCP domain and PA module are enabled. So create new function for that and call it after PA module is enabled. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_net: add Keystone2 K2E SoC supportKhoronzhuk, Ivan2014-10-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Keystone2 Edison SoC uses the same keystone net driver. This patch adds opportunity to use it by K2E SoCs. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_serdes: add keystone K2E SoC supportKhoronzhuk, Ivan2014-10-23-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 Edison SoC uses the same keystone SerDes driver. This patch adds support for K2E SoCs. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: keystone2: keysonte_nav: add support for K2E SoCKhoronzhuk, Ivan2014-10-23-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 Edison SoC uses the same keystone navigator, but uses different NETCP PktDMA definitions. This patch adds required definitions. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_net: register eth PHYs on MDIO busKhoronzhuk, Ivan2014-10-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As MDIO bus has been added we can register PHYs with it. After registration, the PHY driver will be probed according to the hardware on board. Startup PHY at the ethernet open. Use phy_startup() instead of keystone_get_link_status() when eth open, as it verifies PHY link inside and SGMII link is checked before. For K2HK evm PHY configuration at init was absent, so don't enable phy config at init for k2hk evm. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | soc: keystone_serdes: generalize to be used by other sub systemsHao Zhang2014-10-23-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SerDes driver is used by other sub systems like PCI, sRIO etc. So modify it to be more general. The SerDes driver provides common API's that can also be extended for other peripherals SerDes configurations. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | soc: keystone_serdes: enhance to use cmu/comlane/lane specific configurationsHao Zhang2014-10-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Enhance the driver to use cmu/comlane/lane specific configurations instead of 1 big array of configuration. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | soc: keystone_serdes: create a separate SGMII SerDes driverKhoronzhuk, Ivan2014-10-23-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch split the Keystone II SGMII SerDes related code from Ethernet driver and create a separate SGMII SerDes driver. The SerDes driver can be used by others keystone subsystems like PCI, sRIO, so move it to driver/soc/keystone directory. Add soc specific drivers directory like in the Linux kernel. It is going to be used by keysotone soc specific drivers. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_net: increase MDIO clock frequencyVitaly Andrianov2014-10-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With MAC_PHY sgmii configuration, u-boot checks PHY link status before sending each packet. Increasing MDIO frequency increases overall tftp speed. We set it to maximum 2.5MHz. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_net: move header file from arch to ti-commonKhoronzhuk, Ivan2014-10-23-256/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The header file for the driver should be in correct place. So move it to "arch/arm/include/asm/ti-common/keystone_net.h" and correct driver's external dependencies. At the same time align and correct some definitions. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_net: add support for NETCP v1.5Khoronzhuk, Ivan2014-10-23-62/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the network driver is used only by k2hk evm board. The k2hk SoC contains NETCP v1.0, but Keystone2 SoCs, like k2e contain NETCP v1.5. So driver should be able to work with such kind of NETCP. This commit adds this opportunity. The main difference in masks and some registers, the logic is the same, so only definitions should be changed. To differentiate between versions add KS2_NETCP_V1_0 and KS2_NETCP_V1_5. Also remove unused and no more needed defines. The port number is specific for each board so move this parameter to configuration. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | net: keystone_net: remove SoC specific emac_regs structureHao Zhang2014-10-23-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes K2HK SOC specifc emac_regs structure, it uses soc specific register offset to keep the network driver common across all the Keystone II EVMs. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone2: k2l-evm: add board supportHao Zhang2014-10-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds Keystone II Lammar (K2L) EVM board support. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone2: enable OSR clock domain for K2L SoCHao Zhang2014-10-23-0/+25
| | | | | | | | | | | | | | | | | | | | | This patches enables the On-chip Shared Ram clock domain for K2L SoC. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: keystone2: spl: move board specific codeHao Zhang2014-10-23-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The initialization of PLLs is a part of board specific code, so move it appropriate places. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone2: msmc: add MSMC cache coherency support for K2L SOCHao Zhang2014-10-23-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds Keystone II Lamar (K2L) SoC specific definitions to support MSMC cache coherency. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone2: clock: add K2L clock definitions and commandsHao Zhang2014-10-23-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock definitions and commands to support Keystone II K2L SOC. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: keystone2: add K2L device hardware definitionsHao Zhang2014-10-23-2/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds hardware definitions specific to Keystone II Lamar (K2L) SoC. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | ARM: cmd_clock: generalize command usage descriptionKhoronzhuk, Ivan2014-10-23-44/+54
| | | | | | | | | | | | | | | | | | | | | | | | The usage description of commands refers to headers of sources, that is not correct. This patch is intended to fix it. Also generalize code in order to reduce SoC dependent #ifdefs. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone: usb: add support of usb xhciWingMan Kwok2014-10-23-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of usb xhci. xHCI controls all USB speeds of the Host mode, that is, the SS through the SS PHY, as well as the HS, FS, and LS through the USB2 PHY. xHCI replaces and supersedes all previous host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not backwards compatible with any of them. The USB3SS’s USB Controller is fully compliant with xHC. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | dma: keystone_nav: generalize driver usageKhoronzhuk, Ivan2014-10-23-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The keystone_nav driver is general driver intended to be used for working with queue manager and pktdma for different IPs like NETCP, AIF, FFTC, etc. So the it's API shouldn't be named like it works only with one of them, it should be general names. The names with prefix like netcp_* rather do for drivers/net/keystone_net.c driver. So it's good to generalize this driver to be used for different IP's and delete confusion with real NETCP driver. The current netcp_* functions of keystone navigator can be used for other settings of pktdma, not only for NETCP. The API of this driver is used by the keystone_net driver to work with NETCP, so net driver also should be corrected. For convenience collect pkdma configurations in drivers/dma/keystone_nav_cfg.c. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | dma: keystone_nav: move keystone_nav driver to driver/dma/Khoronzhuk, Ivan2014-10-23-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The keystone_nav is used by drivers/net/keystone_net.c driver to send and receive packets, but currently it's placed at keystone arch sources. So it should be in the drivers directory also. It's separate driver that can be used for sending and receiving pktdma packets by others drivers also. This patch just move this driver to appropriate directory and doesn't add any functional changes. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone2: keystone_nav: don't use hard addresses in netcp_pktdmaKhoronzhuk, Ivan2014-10-23-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use definitions in netcp_pktdma instead direct addresses. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initialization. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | keystone2: keystone_nav: don't use hard addresses in qm_configKhoronzhuk, Ivan2014-10-23-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | Use definitions in qm_config. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initialization. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-10-27-16/+1
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| * | | arm: socfpga: Zap spl.h and ad-hoc related symsMarek Vasut2014-10-27-16/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to the common spl.h file and zap the arch/spl.h . Since the arch/spl.h contained various ad-hoc symbols, zap those symbols as well and rework the board configuration a little so it doesn't depend on them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Pavel Machek <pavel@denx.de>
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