summaryrefslogtreecommitdiff
path: root/arch/arm/include
Commit message (Collapse)AuthorAgeLines
* mx6sx: Add pin definitionsFabio Estevam2014-07-10-0/+1677
| | | | | | Add the pin definitions for mx6sx. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Add support for the mx6solox variantFabio Estevam2014-07-10-5/+339
| | | | | | | | | | | | mx6solox is the newest member of the mx6 family. Some of the new features on this variants are: - Cortex M4 microcontroller (besides the CortexA9) - Dual Gigabit Ethernet Add the initial support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10Eric Nelson2014-07-10-2/+2
| | | | | | | | | | | | | | | The pad settings for DISP0_DATA02 and DISP0_DAT10 were not set in the same way as DISP0_DAT00-23, causing much flicker in parallel RGB displays on Dual-Lite and Solo processors. These settings now match the i.MX6 Dual and Quad core versions. Note that this fixes a regression in commit b47abc3 and that this is the second time we've had a regression on these two pads (See commit e654ddf). Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* imx: correct HAB status for new chip TOStefano Babic2014-06-17-7/+16
| | | | | | | | | | | | | | | | | | | | According to: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0 ENGR00287268 mx6: fix the secure boot issue on the new tapout chip commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b newer i.MX6 silicon revisions have an updated ROM and HAB API table. Please see also: i.MX Applications Processors Documentation Engineering Bulletins EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison With this change the secure boot status is correctly displayed Signed-off-by: Stefano Babic <sbabic@denx.de>
* mx6: Fix definition of IOMUXC_GPR12_DEVICE_TYPE_RCFabio Estevam2014-06-17-1/+1
| | | | | | | | | | | | mx6 reference manual incorrectly states that the DEVICE_TYPE field of IOMUXC_GPR12 register should be configured as '0010' for setting the PCI controller in RC mode. The correct value should be '0100' instead. This also aligns with the same value used in the mx6 pci kernel driver. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* imx: iomux: add macros to setup iomux for multiple SoC typesTim Harvey2014-06-06-0/+25
| | | | | | | | | | | | | | | | Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list and add macros for declaring the pad_list that take into account the SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL iomux). Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* mx6: add mmdc configuration for MX6Q/MX6DLTim Harvey2014-06-06-0/+72
| | | | | | | | | | | | | | | - add function for configuring iomux based on board-specific regs - add function for configuring mmdc based on board-specific and chip-specific data Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* mx6: add structs for mmdc and ddr iomux registersTim Harvey2014-06-06-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | Add memory-mapped structures for MMDC iomux and configuration. Note that whi the MMDC configuration registers are common between the IMX6DQ (IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux registers differ. This requires two sets of structures. Add structures to describe DDR3 device information, system information (memory layout, etc), and MMDC calibration registers that can be used to configure the MMDC dynamically. We define these structures for SPL builds instead of including mx6q-ddr.h an mx6dl-ddr.h which use the same namespace and are only useful for imximage cf files. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
* spl: consolidate arch/arm/include/asm/arch-*/spl.hMasahiro Yamada2014-06-06-134/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/include/asm/spl.h requires all SoCs to have arch/arm/include/asm/arch-*/spl.h. But many of them just define BOOT_DEVICE_* macros. Those macros are used in the "switch (boot_device) { ... }" statement in common/spl/spl.c. So they should not be archtecture specific, but be described as a simpile enumeration. This commit merges most of arch/arm/include/asm/arch-*/spl.h into arch/arm/include/asm/spl.h. With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h will be merged, while I am not sure about OMAP and Exynos. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> CC: Stefano Babic <sbabic@denx.de> CC: Minkyu Kang <mk7.kang@samsung.com> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bo Shen <voice.shen@atmel.com> [on sama5d3xek board for at91 part] Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stefano Babic <sbabic@denx.de> [applying Tim's i.MX6 patches] Acked-by: Tom Rini <trini@ti.com>
* sunxi: mmc supportIan Campbell2014-05-25-0/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com>
* sunxi: add sun7i cpu, board and start of day supportIan Campbell2014-05-25-0/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds generic board, start of day and basic build system support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Adam Sampson <ats@offog.org> Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luc Verhaegen <libv@skynet.be> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Patrick Wood <patrickhwood@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
* sunxi: add sun7i dram setup supportIan Campbell2014-05-25-0/+179
| | | | | | | | | | | | | | | | | | | | This patch adds DRAM initialisation support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
* sunxi: add sun7i pinmux and gpio supportIan Campbell2014-05-25-0/+147
| | | | | | | | | | | | | | | | | | This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
* sunxi: add sun7i clocks and timer support.Ian Campbell2014-05-25-0/+389
| | | | | | | | | | | | | | | | | | | | | | This patch adds the basic clocks and timer support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Some of the code here is common to multiple sunxi subarchtectures, hence files are named sun4i which is the earliest similar variant. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
* arm: vf610: add DDR_SEL_PAD_CONTR registerStefan Agner2014-05-25-0/+1
| | | | | | | | Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM issues with newer silicon (1.1). This register was added in revision 4 of the Vybrid Reference Manual. Signed-off-by: Stefan Agner <stefan@agner.ch>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-24-122/+258
|\
| * armv7:TI: Add <asm/ti-common/sys_proto.h> and migrate omap_hw_init_contextTom Rini2014-05-23-110/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | The omap_hw_init_context function (and assorted helpers) is the same for all OMAP-derived parts as when CHSETTINGS are used, that's the same and our DDR base is also always the same. In order to make this common we simply need to update the names of the define for DDR address space which is also common. Cc: Sricharan R. <r.sricharan@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA72x: Add Silicon ID supportLokesh Vutla2014-05-23-0/+2
| | | | | | | | | | | | | | Add silicon ID code for DRA722 silicon. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Tom Rini <trini@ti.com>
| * ARM: omap: merge GPMC initialization code for all platformpekon gupta2014-05-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like; - parallel NOR flash - parallel NAND flash - OneNand flash - SDR RAM - Ethernet Devices like LAN9220 Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms. Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device Signed-off-by: Pekon Gupta <pekon@ti.com> [trini: define GPMC_SIZE_256M for omap3] Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: omap5: add platform specific info for GPMC and ELM controllerspekon gupta2014-05-23-6/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files. Platform specific information added into arch-xx/../hardware.h - CPU related platform specific details like base-address of GPMC and ELM Platform specific information added into arch-xx/../mem.h - Generic configs for GPMC and ELM initialization. - Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available Signed-off-by: Pekon Gupta <pekon@ti.com>
| * ARM: omap4: add platform specific info for GPMC and ELM controllerspekon gupta2014-05-23-6/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files. Platform specific information added into arch-xx/../hardware.h - CPU related platform specific details like base-address of GPMC and ELM Platform specific information added into arch-xx/../mem.h - Generic configs for GPMC and ELM initialization. - Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available Signed-off-by: Pekon Gupta <pekon@ti.com>
* | Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'Albert ARIBAUD2014-05-23-6/+15
|\ \
| * | arm: rmobile: koelsch: Fix QoS revision 0.240 and 0.320Nobuhiro Iwamatsu2014-05-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add register define of DBSC3 operation adjustment register, and add initial value. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | gpio: r8a7790-gpio: Fix typo in macroNobuhiro Iwamatsu2014-05-21-3/+3
| | | | | | | | | | | | | | | | | | Fix typo from __ASM_R8A7790_H__ to __ASM_R8A7790_GPIO_H__. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | gpio: r8a7791-gpio: Fix typo in macroNobuhiro Iwamatsu2014-05-21-3/+3
| | | | | | | | | | | | | | | | | | Fix typo from __ASM_R8A7791_H__ to __ASM_R8A7791_GPIO_H__. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | arm: rmobile: Add define of SCIF register for R8A7790 and R8A7791Nobuhiro Iwamatsu2014-05-21-0/+8
| |/ | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD2014-05-23-1/+14
|\ \
| * | ARM: zynq: ehci: Added USB host driver supportMichal Simek2014-05-14-0/+2
| | | | | | | | | | | | | | | | | | | | | Added USB host driver for zynq. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Add MIO detection codeMichal Simek2014-05-14-0/+1
| | | | | | | | | | | | | | | | | | | | | Add run-time MIO pin detection to get actual pin configuration for specific periphery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Fix bootmode maskMike Looijmans2014-05-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bootmode mask was defined as 0x0F, but documentation mentions 0x07. Experiments show that bit "3" is the JTAG chain configuration. Change the mask to "7" to allow systems with a different chain configuration to boot correctly. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Added efuse status register base addressSiva Durga Prasad Paladugu2014-05-14-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added efuse status register base address. This register is used for determining whether efuse was blown or not. Also, added the zynq_get_silicon_version() to get the silicon version of the zynq board. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-05-22-1661/+3188
|\ \ \ | | |/ | |/|
| * | Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2014-05-20-1/+2
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatting (commit 1b37fa83).
| * | Merge remote-tracking branch 'u-boot-sh/rmobile'Albert ARIBAUD2014-05-16-1222/+656
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Trivial conflict, maintainer change plus board addition
| | * | arm: rmobile: Add register infomation of PLL regsiterNobuhiro Iwamatsu2014-04-28-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | arm: rmobile: r8a7791: Add support ES2 revisionNobuhiro Iwamatsu2014-04-28-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is ES2 is a new revision to R8A7791. This adds support this revision. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | arm: rmobile: r8a7790: Add support ES2 revisionNobuhiro Iwamatsu2014-04-28-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is ES2 is a new revision to R8A7790. This adds support this revision. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | arm: rmobile: Add prototype for function to get the CPU information to rmobile.hNobuhiro Iwamatsu2014-04-28-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are defined but has no prototype declaration. Add them. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | arm: rmobile: Coordinate the common part of the header file of r8a7790 and ↵Nobuhiro Iwamatsu2014-04-28-1224/+640
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r8a7791 Header files of R8A7790 and R8A7791 have common part of many. This coordinates as rcar-base.h. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-16-0/+208
| |\ \ \
| | * \ \ Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-05-15-0/+147
| | |\ \ \
| | * | | | imx25: Add new hardware registersThomas Diener2014-05-09-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Diener <dietho@gmx.de>
| | * | | | iomux-v3: Add support for mx6sl LVE bitFabio Estevam2014-05-09-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL register that can enable or disable low voltage on the pad. LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the calculation easier we can define it as a flag in bit 1, since this bit is unused. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | | | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-04-29-2814/+2672
| | |\ \ \ \ | | | | |/ / | | | |/| |
| | * | | | mx6slevk: Add SPI NOR flash supportFabio Estevam2014-04-28-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | | imx-common/video: add detect_hdmiEric Benard2014-04-15-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this function is used by several board together with board_video_skip to detect if hdmi is plugged is order to select the display to use. So move it in imx-common to share it. Signed-off-by: Eric Bénard <eric@eukrea.com>
| | * | | | imx-common: add board_video_skipEric Benard2014-04-15-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this function is shared by several boards and thus can be factorized Signed-off-by: Eric Bénard <eric@eukrea.com> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-16-0/+6
| |\ \ \ \ \
| | * | | | | ARM: OMAP5: add CKO buffer control maskDmitry Lifshitz2014-05-13-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CKOBUFFER_CLK_EN bit mask enabling FREF_XTAL_CLK clock. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
| | * | | | | ARM: OMAP5: add UART4 supportDmitry Lifshitz2014-05-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add UART4 base address. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
generated by cgit v1.1 at 2024-11-06 01:40:47 +0000