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* video: support exynos display port driversDonghwa Lee2012-09-01-0/+965
* EXYNOS5: add display port base addressDonghwa Lee2012-09-01-0/+3
* EXYNOS5: support display port phy control functionDonghwa Lee2012-09-01-0/+5
* video: support exynos fimd driver for various exynos seriesDonghwa Lee2012-09-01-1/+24
* EXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-2/+5
* EXYNOS5: CLOCK: Add BPLL supportRajeshwari Shinde2012-09-01-0/+3
* EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-0/+3
* Exynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-0/+65
* EXYNOS5: CLOCK: define additional clock registers for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-108/+126
* ARCH: SPL: Add parametric board initializerRajeshwari Shinde2012-09-01-0/+97
* ARM: add tegra20 support to arm720tAllen Martin2012-09-01-0/+29
* tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-26/+26
* ARM: add basic support for the Broadcom BCM2835 SoCStephen Warren2012-09-01-0/+139
* u8500: Enabling power to MMC device on AB8500 V2Mathieu J. Poirier2012-09-01-2/+20
* u8500: Moving processor-specific functions to cpu area.Mathieu J. Poirier2012-09-01-0/+1
* snowball: applying power to LAN and GBF controllersMathieu J. Poirier2012-09-01-3/+15
* snowball: Moving to ux500.v2 addess scheme for PRCMU accessMathieu J. Poirier2012-09-01-4/+8
* snowball: Adding CPU clock initialisationMathieu J. Poirier2012-09-01-4/+1
* snowball: Adding architecture dependent initialisationMathieu J. Poirier2012-09-01-5/+19
* u8500: Moving prcmu to cpu directoryMathieu J. Poirier2012-09-01-0/+55
* snowball: Add support for ux500 based snowball boardMathieu J. Poirier2012-09-01-0/+212
* am33xx evm: Update secure_emif_sdram_config during ddr initSatyanarayana, Sandhya2012-09-01-0/+3
* da8xx/hawkboard: Add support for ohci host controllerSughosh Ganu2012-09-01-0/+106
* omap4/5/am33xx: Make lowlevel_init available to all armv7 platformsTom Rini2012-09-01-5/+2
* am33xx: Correct MMC1, remove MMC2 supportTom Rini2012-09-01-3/+2
* mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador2012-09-01-2/+2
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-01-16/+16
* mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador2012-09-01-509/+509
* mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador2012-09-01-0/+0
* MX28: extend print_cpuinfo() to use chip informationOtavio Salvador2012-09-01-0/+4
* arm : Atmel : add at91sam9x5ek board supportBo Shen2012-09-01-0/+265
* DaVinci DA8xx: replace magic number for DDR speedLaurence Withers2012-09-01-0/+2
* DaVinci DA850: UART2 clock ID comes from ASYNC3Laurence Withers2012-09-01-1/+3
* DaVinci DA8xx: tidy up clock ID definitionLaurence Withers2012-09-01-16/+40
* am33xx: Rework pinmux functionsTom Rini2012-09-01-26/+28
* am33xx: Add support for TI AM335x StarterKit EVMTom Rini2012-09-01-0/+1
* am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and supportTom Rini2012-09-01-0/+17
* am33xx: Correct and clean up ddr_regs structTom Rini2012-09-01-19/+18
* am33xx: Do not touch 'ratio1' fieldsTom Rini2012-09-01-18/+7
* am33xx: Rework config_io_ctrl slightlyTom Rini2012-09-01-12/+1
* am33xx: Use emif_regs struct for storing initialization valuesTom Rini2012-09-01-34/+4
* am33xx: Turn a number of 'int' functions to 'void'Tom Rini2012-09-01-6/+6
* am33xx: Document what we're doing with ddrctrl->ddrckectrlTom Rini2012-09-01-0/+1
* am335x: ddr_defs: Update EMIF parametersVaibhav Bedia2012-09-01-5/+5
* am33xx: Clean up unused DDR defines, prefix more with 'DDR2'Tom Rini2012-09-01-20/+12
* am33xx: Move the call to ddr_pll_config, make it take the frequencyTom Rini2012-09-01-0/+1
* am33xx: Pass to config_ddr the type of memory that is connectedTom Rini2012-09-01-2/+8
* am33xx: Make config_cmd_ctrl / config_ddr_data take const structsTom Rini2012-09-01-2/+2
* am33xx: Convert to using <asm/emif.h> to describe the EMIFTom Rini2012-09-01-27/+0
* am33xx: Remove DMM_BASE defineTom Rini2012-09-01-1/+0
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