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* ENGR00326277-1: imx6: ldo_bypass: fix VDDARM voltage setting violate datasheetRobin Gong2014-08-26-1/+3
| | | | | | | | | Current only set VDDARM_IN@1.175V/VDDSOC_IN@1.175V before ldo bypass switch. So untile ldo bypass switch happened, these voltage setting is set in ldo-enable mode. But in datasheet, we need 1.15V + 125mV = 1.275V for VDDARM_IN. We need to downgrade cpufreq to 400Mhz and restore after ldo bypass mode switch. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00325255 pcie:enable pcie support on imx6sx sdRichard Zhu2014-07-31-1/+12
| | | | | | | | | | | | | | Enable pcie support in uboot on imx6sx sd boards - enable_pcie_clock should be call before ssp_en is set, since that ssp_en control the phy_ref clk gate, turn on it after the source of the pcie clks are stable. - add debug info - add rx_eq of gpr12 on imx6sx - there are random link down issue on imx6sx. It's pcie ep reset issue. solution:reset ep, then retry link can fix it. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00322860 iMX6SX: Add function to check M4 status before bootingYe.Li2014-07-17-0/+1
| | | | | | | Add new function "arch_auxiliary_core_check_up" to check whether M4 is already up. Therefore, avoid starting M4 again when it is running. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319003 iMX6SX:HAB: Fixed build break when enabling secure bootYe.Li2014-06-18-2/+2
| | | | | | | | | | | | | | | When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform due to two problems. 1. The imximage tool in v2014 changes the command name of "SECURE_BOOT" to "CSF". Must update it in imximage.cfg scripts. 2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API definitions are not defined and cause compile errors. (HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW, HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-77 mx6 soc: Add vadc power up/down functionYe.Li2014-06-17-0/+12
| | | | | | | Add vadc power up/down function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-76 mx6 clock: Add vadc clock enable functionYe.Li2014-06-17-0/+1
| | | | | | | Add vadc clock enable function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-71 iMX6SX Update registers and clock for displayYe.Li2014-06-17-1/+246
| | | | | | Add registers and clock functions to enable/set LCDIF clock and LVDS. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-70 iMX6SX:Video Update MXS LCDIF driverYe.Li2014-06-17-1/+1
| | | | | | | | | | | | Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and specifies the LCDIF controller for multiple controllers of iMX6SX. Pass fb parameters via "videomode" env remains work if the new interface is not called before video initialization. Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple LCDIF controllers on iMX6SX. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-59 iMX6SX: Add RDC mappings of masters and peripheralsYe.Li2014-06-17-0/+159
| | | | | | | Add the definitions for the RDC mappings on iMX6SX and include this file to "imx-rdc.h" Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-58 RDC: Add an iMX platform driver for RDC-SEMAYe.Li2014-06-17-0/+71
| | | | | | | | | | | | | | The RDC driver provides interfaces for setting peripherals and masters at BSP initialization, before using the peripherals driver. Another interfaces for lock/unlock RDC semaphore and permission check. The driver assumes boot CPU which runs u-boot is in Domain 0 (default setting on boot). Users should not set it to other domains. The peripherals ID and masters ID may change on different chip, each should provide definitions of the IDs and be included in "imx-rdc.h". Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-57 iMX6SX: Add M4 boot support at soc levelYe.Li2014-06-17-0/+5
| | | | | | | | | Implement the override function "arch_auxiliary_core_up" to boot Cortex-M4 by executing command "bootaux". The parameter "boot_private_data" points to fields where stores the stack address and PC address for M4 to run. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-55 iMX6SX: add debug monitor supportYe.Li2014-06-17-0/+17
| | | | | | | | | | | Debug monitor will print out last failed AXI access info when system reboot is caused by AXI access failure, only works when debug monitor is enabled. Enable this module on i.MX6SX. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-54 iMX6SX/SL: Modify SOC to support two ENETYe.Li2014-06-17-1/+32
| | | | | | | | | | | | | | | | | | | | | iMX6SX has different enet system clocks with iMX6SL, and has two ENET controllers. So update clocks and soc APIs accordingly to support this features. 1. Modify the clock API "enable_enet_clock" to enable enet system clock for enet controllers. 2. Enet RGMII TX clock source may come from external or internal PLL. By default, use the external phy CLK_25M output as TX clock source. When using internal PLL as source, the function enable_fec_anatop_clock must be called to enable clock for each enet controller. 3. Modify the MAC address function "imx_get_mac_from_fuse" to get either ENET MAC address. 4. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz reference clock. 5. Modify imx6slevk BSP to fit the new APIs. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-51 iMX6SX: Add QuadSPI clock enable functionYe.Li2014-06-17-0/+3
| | | | | | | Enable the clock for QuadSPI controllers. Must be called at initialization. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-48 iMX6SX: Add iMX6SX SoC supportYe.Li2014-06-17-15/+2100
| | | | | | | | | | | Adding clks, pinmux, memory map, etc for iMX6SoloX. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-44 imx6:USB: Update EHCI driver for OTG lines compatibilityYe.Li2014-06-17-12/+3
| | | | | | | | | | | To be compatible with more USB otg lines which has micro port B to connect imx6 OTG port when imx6 working at host mode, remove the checking for the OTG ID with the init type. Only use the init type for the power and controller initialization. Use same EHCI register base address for various imx6 platform. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315499-17 ARM:imx6sl:evk Add SPI NOR flash boot and access supportNitin Garg2014-06-13-0/+5
| | | | | | | | | | | Add BSP codes to support SPI NOR flash read, write and erase by using "sf" command. In addition, add a new configuration "mx6slevk_spinor" for building the uboot that can be booted from SPI NOR flash and stored the environments variables in it. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-15 ARM:imx6sl:evk Add USB HOST supportNitin Garg2014-06-13-1/+4
| | | | | | | | Enable the USB EHCI for the imx6slevk board. Add VBUS control pin settings and related BSP codes. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-12: ARM: MSL: add i2c0 support for imx6sl evkNitin Garg2014-06-13-0/+5
| | | | | | | | - Add i2c0 support for imx6sl evk platform. - Read pmic device ID and revsion ID. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-11 ARM:imx6 Change static environment SD/MMC storage to dynamicNitin Garg2014-06-13-0/+22
| | | | | | | | | | | | | | | | | | | imx6 boards (sabresd, sabreauto, arm2 and slevk) have multiple SD/MMC ports to boot. But current uboot hard code the SD/MMC port for environment variables storage. So if customer changes a port without modifying the configuration "CONFIG_SYS_MMC_ENV_DEV", error will issue at saving and loading environment. Implement a mechanism to detect SD/MMC port from SRC SMBR register, and override the default "mmc_get_env_devno". The "board_late_mmc_env_init" is used to set "mmcdev" when booting from SD/MMC port. Finally after booting from SD/MMC, the environment storage device and "mmcdev" are both set to current SD/MMC port. Customers don't need to re-build the image if booting from different SD/MMC port. This patch also adds SD1 and SD3 support to imx6slevk BSP, and adds support for sabreauto SD1 slot on base board. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-10 ARM:imx6:sabresd/sabreauto Add android fastboot supportingNitin Garg2014-06-13-0/+22
| | | | | | | | | | | | | | | | | | Support android features: fastboot, booti command and recovery for sabresd SD, sabresd eMMC, sabreauto SD, sabreauto NAND. For all booting media (SD, eMMC, NAND), inherits the partitions layout from v2009.08. Fastboot will detect the booting media to replace hardcoding fastboot device. SATA is not supported. FDT is supported to use the "unused" fields in bootimg header which requires the FDT to be combined into the boot.img. For non-FDT boot.img, the "unused" fields should left to NULL and is compatible to boot. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-9: ARM:iMX6SL EVK: Add keyboard supportNitin Garg2014-05-27-0/+49
| | | | | | | i.MX6sl evk has keyboards on the board, so add mxc_keyb driver to support key press checking. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-8 Auto check if boot from usbNitin Garg2014-05-27-0/+5
| | | | | | | | If boot from usb, reset environment to default value. Auto apply mfgtools setting and boot mfgtools kernel. Signed-off-by: Frank Li <Frank.li@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-7 Add EPDC splash screen for MX 6DL SabreSD and 6SL EVKNitin Garg2014-05-27-0/+48
| | | | | | | | | | | | | | | | | Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board. - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. - EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly (hang), since some additional content on the boot device (waveform file) is required for EPDC splash to work correctly. Please refer to Linux Reference Manual for how to flash WAVEFORM file. Signed-off-by: Robby Cai <R63905@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-6 ARM:imx6: Add USB gadget driver imx_udc to support Android ↵Nitin Garg2014-05-27-0/+497
| | | | | | | | | | | | | | fastboot Android fastboot leans on the USB gadget driver to communicate with host. Porting the imx_udc driver from v2009.08 with two changes: adding resource/memory release APIs and replacing the uncached memory with cache flush&invalidate operations. Pins and Clocks initialization are added to support boards: mx6qdlsabresd, mx6qdlsabreauto, mx6slevk Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-5: Support i.MX6 1.2GHz via LDO bypassNitin Garg2014-05-27-4/+15
| | | | | | | | Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz, enable LDO bypass and setup PMIC voltages. LDO bypass is dependent on the flatten device tree file. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-4: Add support for i.MX6 Plugin imagesNitin Garg2014-05-27-0/+127
| | | | | | | Support generating plugin images. Make sure not to effect the size of DCD images. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-3: Support i.MX6 HAB authentication of kernel imageNitin Garg2014-05-27-6/+22
| | | | | | | Support HAB authentication of kernel or secondary images via bootm or hab_auth_img u-boot command. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-1: Add i.MX6 CPU temperature sensor supportNitin Garg2014-05-27-2/+551
| | | | | | Support CPU temperature sensors on i.MX6 SoC. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-08-10/+15
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * cpu: exynos4: add ace sha base addressPrzemyslaw Marczak2014-03-28-4/+4
| | | | | | | | | | Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
| * spl: Fix guardian macros in spl.hMarek Vasut2014-03-28-6/+6
| | | | | | | | | | | | | | | | | | Fix the macros guarding the spl.h header for various platforms. Due to a typo and a propagation of it, the macros went out-of-sync with their ifdef check, so fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
| * mmc: Split mmc struct, rework mmc initialization (v2)Pantelis Antoniou2014-03-24-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that struct mmc was implemented was a bit of a mess; configuration and internal state all jumbled up in a single structure. On top of that the way initialization is done with mmc_register leads to a lot of duplicated code in drivers. Typically the initialization got something like this in every driver. struct mmc *mmc = malloc(sizeof(struct mmc)); memset(mmc, 0, sizeof(struct mmc); /* fill in fields of mmc struct */ /* store private data pointer */ mmc_register(mmc); By using the new mmc_create call one just passes an mmc config struct and an optional private data pointer like this: struct mmc = mmc_create(&cfg, priv); All in tree drivers have been updated to the new form, and expect mmc_register to go away before long. Changes since v1: * Use calloc instead of manually calling memset. * Mark mmc_register as deprecated. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | arm64 patch: gicv3 supportDavid Feng2014-04-08-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add gicv3 support to uboot armv8 platform. Changes for v2: - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S - move smp_kick_all_cpus() from gic.S to start.S, it would be implementation dependent. - Each core initialize it's own ReDistributor instead of master initializeing all ReDistributors. This is advised by arnab.basu <arnab.basu@freescale.com>. Signed-off-by: David Feng <fenghua@phytium.com.cn>
* | arm: vf610: add enet1 supportMarcel Ziswiler2014-04-07-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains several changes required for second Ethernet (enet1/RMII1) port on vf610 - ANADIG PLL5 control definitions required for Ethernet RMII1 clock - Secondary Ethernet (enet1) MAC RMII1 base address definition - RMII1 iomux definitions - VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for internal (e.g. crystal-less) Ethernet clocking. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: add uart0 clock/iomux definitionsMarcel Ziswiler2014-04-07-0/+3
| | | | | | | | | | | | | | | | | | Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux definitions for UART0 (aka. SCI0). Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: fix anadig register structMarcel Ziswiler2014-04-07-25/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The anadig_reg structure started at the wrong offset (fixed by adding reserved_0x000[4]), was missing some reserved field required for alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl) and further contained a too short reserved field causing further miss- alignment (reserved_0x0C4[7]). Also, rename all the reserved fields and using a memory offset based scheme for. Discovered and tested by temporarily putting the following debug instrumentation into board_init(): struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR; printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl); printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl); Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | armv8/cache: Change cache invalidate and flush functionYork Sun2014-04-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | socfpga: Adding Clock Manager driverChin Liang See2014-04-07-0/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-1/+1
|\ \ | |/ | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| * kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIGMasahiro Yamada2014-03-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michael Walle <michael@walle.cc> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Dave Purdy <david.c.purdy@gmail.com> Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Cc: Luka Perkov <luka@openwrt.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Jason Cooper <u-boot@lakedaemon.net> Cc: Siddarth Gore <gores@marvell.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Eric Cooper <ecc@cmu.edu> Cc: Suriyan Ramasami <suriyan.r@gmail.com>
* | arm:exynos: add common DTS file for exynos 4Piotr Wilczek2014-03-12-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds common dtsi file and config header for all Exynos 4 based boards. Patch additionaly adds board specific (weak) functions for board_early_init_f and board_power_init functions. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | drivers:mmc:sdhci: enable support for DTPiotr Wilczek2014-03-12-0/+7
| | | | | | | | | | | | | | | | | | This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | video:mipidsim:fdt: Add DT support for mipi dsim driverPiotr Wilczek2014-03-12-0/+5
|/ | | | | | | | | This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-10-1/+29
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| * arm: atmel: sama5d3: add nand spl boot supportBo Shen2014-03-09-0/+2
| | | | | | | | | | | | | | Add NAND SPL boot support with hardware PMECC. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: add spi spl boot supportBo Shen2014-03-09-0/+2
| | | | | | | | | | | | | | Add SPI SPL boot support for sama5d3xek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * at91 gpio: fix typo in compatibility macroAndreas Henriksson2014-03-09-1/+1
| | | | | | | | | | | | | | | | | | | | It's called _pio_ in the version that was added to git. Apparently it got renamed without updating the macros before it was applied, c.f. http://u-boot.10912.n7.nabble.com/U-Boot-PATCH-3-9-V3-add-a-new-AT91-GPIO-driver-td75922.html Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124Stephen Warren2014-03-05-0/+5
| | | | | | | | | | | | | | | | Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct address. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: fix pmc_pwrgate_timer_mult register definitionStephen Warren2014-03-05-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and Tegra124. Reflect this in pmc.h. Also, simply write the whole of the register in start_cpu() rather than doing a read-modify-write; the register is simple enough that the code can easily construct the entire desired value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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