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* arm, nds32, sh: remove useless ioremap()/iounmap() definesMasahiro Yamada2016-07-14-34/+0
| | | | | | | These defines are valid only when iomem_valid_addr is defined, but I do not see such defines anywhere. Remove. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* arm: add missing writes[bwql], reads[bwql].Purna Chandra Mandal2016-04-10-0/+7
| | | | | | | ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h but not the writes[bwql], reads[bwql] needed by some drivers. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* Data types defined for 64 bit physical addressAneesh Bansal2015-10-29-2/+2
| | | | | | | | Data types and I/O functions have been defined for 64 bit physical addresses in arm. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arm: ls102xa: Add Freescale LS102xA SoC supportWang Huan2014-09-08-1/+7
| | | | | | | | | | | | | | | | | | The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* ARM:asm:io.h use static inlineJeroen Hofstee2014-08-29-6/+6
| | | | | | | | | | | When compiling u-boot with W=1 the extern inline void for read* is likely causing the most noise. gcc / clang will warn there is never a actual declaration for these functions. Instead of declaring these extern make them static inline so it is actually declared. cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* driver/ddr: Fix DDR4 driver for ARMYork Sun2014-07-22-0/+1
| | | | | | | Previously the driver was only tested on Power SoCs. Different barrier instructions are needed for ARM SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
* Added 64-bit MMIO accessors for ARMv8J. German Rivera2014-07-03-0/+8
| | | | | | | This is needed for accessing peripherals with 64-bit MMIO registers, from ARMv8 processors. Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
* arm: Support iotrace featureSimon Glass2014-06-20-0/+3
| | | | | | Support the iotrace feature for ARM, when enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm64: core supportDavid Feng2014-01-09-6/+9
| | | | | | | Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
* ARM: fix write*() I/O accessorsWolfgang Denk2011-02-21-3/+3
| | | | | | | | | | | | | | | | | | | Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb and friends." introduced I/O accessors with memory barriers. Unfortunately the new write*() accessors introduced a bug: The problem is that the argument "v" gets evaluated twice. This breaks code like used here (from "drivers/net/dnet.c"): for (i = 0; i < wrsz; i++) writel(*bufp++, &dnet->regs->TX_DATA_FIFO); Use auxiliary variables to avoid such problems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Alexander Holler <holler@ahsoftware.de> Cc: Dirk Behme <dirk.behme@googlemail.com>
* ARM: Avoid compiler optimization for readb, writeb and friends.Alexander Holler2011-02-02-12/+20
| | | | | | | | | | | | | | | | | | | | | gcc 4.5.1 seems to ignore (at least some) volatile definitions, avoid that as done in the kernel. Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that gcc version to ignore the volatile type qualifier used e.g. in __arch_getl(). Anyway, using a definition as in the kernel headers avoids such optimizations when gcc 4.5.1 is used. Maybe the headers as used in the current linux-kernel should be used, but to avoid large changes, I've just added a small change to the current headers. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alessandro Rubini <rubini-list@gnudd.com> Tested-by: Thomas Weber <weber@corscience.de> Acked-by: Alexander Holler <holler@ahsoftware.de> Tested-by: Alexander Holler <holler@ahsoftware.de>
* ARM: Define __raw_readX and __raw_writeXMarek Vasut2010-08-07-6/+40
| | | | | | | These functions are undefined on ARM when using __io. These are the commonly used versions and can be redefined. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* ARM: fix bug in macro __arch_ioremap.Terry Lv2010-06-22-7/+7
| | | | | | | | Signed-off-by: Terry Lv <r65388@freescale.com> Fix commit message and code formatting. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Move architecture-specific includes to arch/$ARCH/include/asmPeter Tyser2010-04-13-0/+395
This helps to clean up the include/ directory so that it only contains non-architecture-specific headers and also matches Linux's directory layout which many U-Boot developers are already familiar with. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>