arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	armv8: Fix TCR macros for shareability attribute	Zhichun Hua	2015-07-20	-2/+2
\| \| \| \| \| \| \| \|	For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit position [13:12] of TCR_ELx register. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
*	armv8/fsl-lsch3: Change normal memory shareability	York Sun	2015-02-24	-1/+2
\| \| \| \| \| \| \|	According to hardware implementation, a single outer shareable global coherence group is defined. Inner shareable has not bee enabled. Signed-off-by: York Sun <yorksun@freescale.com>
*	ARMv8: Adjust MMU setup	York Sun	2014-07-03	-0/+24
\| \| \| \| \| \| \|	Make MMU function reusable. Platform code can setup its own MMU tables. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
*	arm64: core support	David Feng	2014-01-09	-0/+111
	Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>