| Commit message (Expand) | Author | Age | Lines | |
|---|---|---|---|---|
| * | armv8: New MMU setup code allowing to use 48+ bits PA/VA | Sergey Temerkhanov | 2016-01-19 | -6/+76 |
| * | armv8/layerscape: Update MMU table with execute-never bits | Alison Wang | 2015-11-30 | -1/+1 |
| * | armv8/fsl_lsch2: Add fsl_lsch2 SoC | Mingkai Hu | 2015-10-29 | -0/+1 |
| * | armv8/mmu: Set bits marked RES1 in TCR | Thierry Reding | 2015-10-15 | -0/+4 |
| * | armv8/mmu: Clean up TCR programming | Thierry Reding | 2015-10-15 | -2/+2 |
| * | armv8: fsl-lsch3: Rewrite MMU translation table entries | Alison Wang | 2015-09-01 | -1/+7 |
| * | armv8: Fix TCR macros for shareability attribute | Zhichun Hua | 2015-07-20 | -2/+2 |
| * | armv8/fsl-lsch3: Change normal memory shareability | York Sun | 2015-02-24 | -1/+2 |
| * | ARMv8: Adjust MMU setup | York Sun | 2014-07-03 | -0/+24 |
| * | arm64: core support | David Feng | 2014-01-09 | -0/+111 |
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index : arm-boot/u-boot-imx.git | |
| U-boot NXP imx6 | git@iatec.biz |
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