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* sunxi: musb: Fix some lo speed devices not working with musb hostHans de Goede2015-03-29-0/+1
| | | | | | | | | | | | | | | | The usb0 / otg phy on sunxi boards has a bug where it wrongly detects a high speed squelch on usb reset deassert when a lo speed device is plugged in. The android kernel has a work around for this in the form of temporary disabling the phy's squelch detection on reset deassert, this commit adds the same workaround to the u-boot sunxi musb code, thereby fixing various usb lo speed devices not working. Tested with a (before non working) usb keyboard and a usb 2.4 GHz wireless keyboard/mouse combo receiver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Fix sun5i mbus speed when booting old kernelsHans de Goede2015-02-21-0/+9
| | | | | | | | | Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, halving the mbus frequency, so set it to 300 MHz ourselves and base the mbus divider on that. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Normalise FEL supportSimon Glass2015-02-16-0/+10
| | | | | | | | | | | | Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: dram: Un-inline dram helper functionsHans de Goede2015-02-16-26/+2
| | | | | | | | | Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sunxi: rsb: Move rsb_set_device_mode() call to rsb_init()Hans de Goede2015-02-02-2/+2
| | | | | | | | It turns out that the device_mode_data is rsb specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init(). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: rsb: Add sun9i (A80 support)Hans de Goede2015-02-02-2/+12
| | | | | | | Add support for the A80 to the rsb code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add a GMAC Transmit Clock Delay Chain Kconfig optionHans de Goede2015-02-02-0/+4
| | | | | | | | And use this to set the GMAC Transmit Clock Delay Chain value on Banana boards, rather then keying of CONFIG_TARGET_FOO. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Hookup OTG USB controller supportHans de Goede2015-01-22-0/+2
| | | | | | | | | | | Hookup OTG USB controller support and enable the otg controller + USB-keyb on various tablets. This allows tablet owners to interact with u-boot without needing to solder a serial console onto their tablet PCB. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Use frontend for dma on sun4i to fix memory bandwidth problemsHans de Goede2015-01-22-0/+120
| | | | | | | | | | | | | | | | | | | | Testing has shown that on sun4i the display backend engine does not have deep enough fifo-s causing flickering / tearing in full-hd mode due to fifo underruns. On sun4i use the display frontend engine to do the dma from memory, as the frontend does have deep enough fifo-s. As added advantage of this is that it results in much better memory bandwidth as it reduces the amount of dram bank switches, for more details see: http://ssvb.github.io/2014/11/11/revisiting-fullhd-x11-desktop-performance-of-the-allwinner-a10.html Note that this changes the pipeline searched for in the simplefb node, we can get away with doing this now, since no kernel has yet shipped with simplefb dtb nodes, and I will make sure to get a simplefb node with the new pipeline into 3.19 before it ships. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Stop differentiating between 512M and 1G variants of the same boardHans de Goede2015-01-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | While working on adding more boards I noticed that we lack a config for the 512M cubieboard, and that some of the new boards which I want to add also have 512M and 1G variants, rather then adding 2 defconfig's for all of these, lets switch the exising boards which have both a 512M and 1024M variant over to the sun4i dram autoconfig code. This also drops the foo_RAMSIZE_defconfig variants of boards where we currently have 2 separate configs already. Note: 1) The newly introduced CONFIG_DRAM_EMR1 kconfig value is not used with a value other then its default for now, but we need this to be configurable to support some new boards with auto dram config. 2) We always set all CONFIG_DRAM_foo values in defconfigs, even if they match the defaults, this is done to make it more clear what values are used for a certain board. This has been tested on a Mele A1000, Mini-X and a Cubieboard, all 1G variants, the dram autoconfig code has also been tested on a 512M mk802 (a defconfig for the mk802 is added in a later patch). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: mmc: Add support for sun9i (A80)Hans de Goede2015-01-22-2/+6
| | | | | | | The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun9i: Add clock_sun9i.h with ccu register layout for sun9iHans de Goede2015-01-22-0/+141
| | | | | | | Add a headerfile with the sun9i ccu register layout. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun9i: Add cpu_sun9i.h with iomem definesHans de Goede2015-01-22-0/+112
| | | | | | | Add a headerfile with all the base addresses from the sun9i blocks. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Rename cpu.h to cpu_sun4i.hHans de Goede2015-01-22-145/+157
| | | | | | | | | sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headersHans de Goede2015-01-22-4/+12
| | | | | | | | | | | Which pll-s are available depends on the machine type, move the clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files so that we only declare what is actually available. e.g. clock_get_pll5p() is not available on sun6i / sun8i, and with sun9i we get a completely different set of plls. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: display: Make lcd display clk phase configurableHans de Goede2015-01-22-3/+1
| | | | | | | | | | | | | | | | | | | | While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD module I noticed that the screen flickered. This is caused by the lcd display clk phase reg value being set to 0, where it should be 1 in this setup. This commit adds a Kconfig option for the lcd display clk phase, so that we can set it per board. This defaults to 1, because looking at all the fex files in sunxi-boards, that is by far the most used value. This commit updated the Ippo and MSI Primo73 tablet defconfigs to override the default of 1 with 0, as that is the correct value for those tablets, this keeps the register settings the same as before this commit. The Olinuxino-A13 defconfigs are not updated, changing the register setting for these boards from 0 to 1, this is intentional. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: usbc: Add support for usb0 to the common usbc codeHans de Goede2015-01-14-1/+5
| | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Move usb-controller init code out of ehci-sunxi.c for reuse for otgHans de Goede2015-01-14-3/+24
| | | | | | | | | | Most of the usb-controller init code found in ehci-sunxi.c also is necessary to init the otg usb controller, so move it to a common place. While at it also update various #ifdefs / defines for sun8i support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Add lvds supportHans de Goede2015-01-14-0/+15
| | | | | | | Add support for lvds lcd panels Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* sunxi: video: Add VGA output supportHans de Goede2015-01-14-0/+78
| | | | | | | Add support for VGA directly from the sunxi SoC / display engine. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Add lcd output supportHans de Goede2015-01-14-6/+26
| | | | | | | | Add lcd output support, see the new Kconfig entries and doc/README.video for how to enable / configure this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1Hans de Goede2015-01-14-0/+2
| | | | | | | | | | | | | Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1, this is a preparation patch for adding lcd support. While at it also swap the divider search order, searching from low to high, as the comment above the code says we should do. In cases where there are multiple solutions this will result in picking a lower pll clock and divider, which is more stable and saves power. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Add support for gpio pins on the AXP209 pmicHans de Goede2015-01-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | Some boards use GPIO-s on the pmic, one example of this is the A13-OLinuXino board, which uses gpio0 of the axp209 for the lcd-power signal. This commit adds support for gpio pins on the AXP209 pmic, the sunxi_gpio.c changes are universal, adding gpio support for the other AXP pmics (when necessary) should be a matter of adding the necessary axp_gpio_foo functions to their resp. drivers, and add "#define AXP_GPIO" to their header file. Note this commit only adds support for the non device-model version of the gpio code, patches for adding support to the device-model version are very welcome. The string representation for these gpio-s is AXP0-#, the 0 in the AXP0 prefix is there in case we need to support gpio-s on more then 1 pmic in the future. At least A80 boards have 2 pmics, and we may end up needing to support gpio-s on both. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Properly sort mux defines by port numberHans de Goede2015-01-14-5/+5
| | | | | | | | Move a few mux defines around so that all the mux defines are properly sorted by port number. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Set input sync enableHans de Goede2015-01-14-0/+1
| | | | | | | | | | | | | | | | | | | Add a write to the "unknown" (*) register to enable auto input sync, when initially adding sunxi hdmi output support this magic write from the android kernel code was missed, causing lcdc -> hdmi encoder sync problems. With this write added, we can drop the modesetting retries and the extra delays added to work around these sync problems. With the retries dropped there also is no need to 0 all the enable flags at the beginning of the modeset, as they are initialized to 0 already by engines_init. *) "unknown" is the actual name of this register in the android kernel sources Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Anatolij Gustschin <agust@denx.de>
* sunxi: video: Add hdmi supportHans de Goede2015-01-14-10/+23
| | | | | | | | | | | | | | | | | So far we've been programming the hdmi-encoder to send out dvi data over the hdmi connector. This works well for most devices, including hdmi devices, but not all devices accept dvi data on a hdmi input. Add support for sending proper hdmi data over the hdmi output found on most sunxi boards. This can be turned on by adding monitor=hdmi as option to the video-mode env. variable. A follow up patch will determine whether to send dvi or hdmi automatically when EDID is used. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Anatolij Gustschin <agust@denx.de>
* sunxi: video: Add DDC & EDID supportHans de Goede2015-01-14-0/+85
| | | | | | | | | | Add DDC & EDID support and use it to automatically select the native mode of the attached monitor. This can be disabled by adding edid=0 as option to the video-mode env. variable. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Anatolij Gustschin <agust@denx.de>
* sunxi: Fix PLL1 running at half speed on sun8iHans de Goede2015-01-14-1/+1
| | | | | | | | | | PLL1 on sun6i / sun8i also has a p factor which divides the clock by 2^p (to the power p). On sun6i the p factor is ignored, but on sun8i it is used and we were setting it to 1, resulting in the CPU running at 504 MHz instead of 1008 MHz, this commit fixes this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Fix buggy sun6i/sun8i DRAM size detection logicSiarhei Siamashka2015-01-14-16/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After reboot, reset or even short power off, DRAM typically retains the old stale data for some period of time (for this type of memory, the bits of data are stored in slowly discharging capacitors). The current sun6i/sun8i DRAM size detection logic, which is inherited from the Allwinner code, relies on using a large magic signature with the hope that it is unique enough and unlikely to ever accidentally match this leftover garbage data in RAM. But this approach is inherently unsafe, as can be demonstrated using the following test program: /***** A testcase for reproducing the problem ******/ void main(int argc, char *argv[]) { size_t size, i; uint32_t *buf; /* Allocate the buffer */ if (argc < 2 || !(size = (size_t)atoi(argv[1]) * 1048576) || !(buf = malloc(size))) { printf("Need buffer size in MiB as a cmdline argument\n"); exit(1); } /* Fill it with the Allwinner DRAM "magic" values */ for (i = 0; i < size / 4; i++) buf[i] = 0xaa55aa55 + ((uintptr_t)&buf[i] / 4) % 64; /* Try to reboot */ system("reboot"); /* And wait */ for (;;) {} } /***************************************************/ If this test program is run on the device (giving it a large chunk of memory), then the DRAM size detection logic in u-boot gets confused after reboot and fails to initialize DRAM properly. A better approach is not to rely on luck and abstain from making any assumptions about the properties of the leftover garbage data in RAM. Instead just use a more reliable code for testing whether two different addresses refer to the same memory location. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sun8i: Add dram initialization supportHans de Goede2015-01-14-0/+272
| | | | | | | | Based on the register / dram_para headers from the Allwinner u-boot / linux sources + the init sequences from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Use memcmp for mctl_mem_matchesHans de Goede2015-01-14-9/+3
| | | | | | | Use memcmp for mctl_mem_matches instead of DIY. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Fill memory before comparing it when doing dram init on sun6iHans de Goede2015-01-14-0/+29
| | | | | | | | | | | | | | | | | | | The sun8i boot0 code fills the DRAM with a "random" pattern before comparing it at different offsets to do columns, etc. detection. The sun6i boot0 code does not do it, instead relying on the memory contents being random enough to begin with for the memcmp to properly detect the wrap-around address, iow it is working purely by chance. Since our sun6i dram code was modelled after the boot0 code it contained the same issue. This commit fixes this by filling the memory with a unique, distinct pattern. The new mctl_mem_fill function this introduces is added as an inline helper in dram.h, so that it can be shared with the sun8i dram code. While at it move mctl_mem_matches to dram.h for re-use in sun8i too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Move await_completion dram helper to dram.hHans de Goede2015-01-14-0/+14
| | | | | | | | | The await_completion helper is already copy pasted between the sun4i and sun6i dram code, and we need it for sun8i too, so lets make it an inline helper in dram.h, rather then adding yet another copy. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add a sigma_delta_enable paramter to clock_set_pll5()Hans de Goede2015-01-14-1/+5
| | | | | | | | The sun8i dram code sometimes wants to enable sigma delta mode, add a parameter to allow this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add support for the rsb (Reduced Serial Bus)Hans de Goede2015-01-14-1/+60
| | | | | | | | | | | | sun8i (A23) introduces a new bus for communicating with the pmic, the rsb, the rsb is also used to communicate with the pmic on the A80, and is documented in the A80 user manual. This commit adds support for this based on the rsb driver from the allwinner u-boot sources. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: s/SUNXI_*P2WI*/SUN6I_*P2WI*/Hans de Goede2015-01-14-3/+3
| | | | | | | | The p2wi interface is only available on sun6i, adjust the gpio pinmux and base address defines for it to reflect this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add sunxi_get_sid helper functionHans de Goede2015-01-14-0/+1
| | | | | | | | | | On sun6i the SID is stored in the pmic, rather then in the SoC itself, add a helper function to abstract this away. This makes our MAC address generation code also work on sun6i. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: mmc: Properly setup mod-clk and clock sampling phasesHans de Goede2015-01-14-9/+15
| | | | | | | | | | | | | | | | | | | | | | | The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add sunxi_get_ss_bonding_id() functionHans de Goede2015-01-14-1/+8
| | | | | | | | Add a sunxi_get_ss_bonding_id() function, and use it to differentiate between the A31s and the A31. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add gmac support for sun6i boardsHans de Goede2014-11-25-0/+13
| | | | | | | Hookup the gmac found on the sun6i / A31 SoCs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Add simplefb supportLuc Verhaegen2014-11-25-0/+2
| | | | | | | | | | | | Add simplefb support, note this depends on the kernel having support for the clocks property which has recently been added to the simplefb devicetree binding. Signed-off-by: Luc Verhaegen <libv@skynet.be> [hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as disussed on the devicetree list] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>.
* sunxi: video: Add cfb console driver for sunxiLuc Verhaegen2014-11-25-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | This adds a fixed mode hdmi driver for the sunxi platform. The fixed mode is a relatively safe 1024x768, more complete EDID handling is currently not provided. Only HDMI is supported today. This code is enabled when HPD detects an attached monitor. Current config is such that 8MB is shaved off at the top of the RAM. This avoids several memory handling issues, most significant is the fact that on linux on ARM you are not allowed to remap known RAM as IO. A clued in display driver will be able to recycle this reserved RAM in future though. cfbconsole was chosen as it provides the most important functionality: a working u-boot console, allowing for the debugging of certain issues without the need for a UART. Signed-off-by: Luc Verhaegen <libv@skynet.be> [hdegoede@redhat.com: Major cleanups and some small bugfixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add video pll clock functionsHans de Goede2014-11-25-1/+105
| | | | | | | This is a preparation patch for adding support for HDMI out. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun4i: Rename dram_clk_cfg to dram_clk_gateHans de Goede2014-11-25-1/+1
| | | | | | | | | The data sheet just calls it DRAM_CLK_REG, and on sun6i we've both a dram_clk_cfg and dram_clk_gate, and the sun4i reg matches dram_clk_gate on sun6i, so name it the same on sun4i. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: ehci: Add sun6i ehci supportHans de Goede2014-11-13-0/+22
| | | | | | | | Add support for the 2 ehci controllers found on the sun6i (A31) soc. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Marek Vasut <marex@denx.de>
* sun6i: Add dram initialization codeHans de Goede2014-11-13-3/+368
| | | | | | | | | | | | Add full support for dram initialization, using a fixed clock and autodetection of the memory organization (numbers of channels, bus-width, etc.). This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, extended with extra initialization sequences and the autodetect algorithm from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun4i: Rename dram files to dram_sun4i.xHans de Goede2014-11-13-165/+184
| | | | | | | In preparation for adding sun6i dram support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add cpucfg register definitionsHans de Goede2014-11-13-1/+69
| | | | | | | Not used atm, for future use (e.g. PSCI). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-1/+28
| | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+143
| | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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