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path: root/arch/arm/include/asm/arch-sunxi/gpio.h
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* sunxi: display: Use PWM to drive backlight where applicableHans de Goede2016-08-26-0/+3
| | | | | | | | | | | | | | | | | | | | | When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
* sunxi: Support booting from SPI flashSiarhei Siamashka2016-07-15-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add support for Allwinner A64 SoCsSiarhei Siamashka2016-04-01-0/+1
| | | | | | | | | | | | | | | The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa2016-01-21-0/+2
| | | | | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
* sunxi: Add support for UART0 in PB pin group on A83Tvishnupatekar2015-12-10-0/+1
| | | | | | | | | | On A83T, PB9,PB10 are UART0 pins. On allwinner A83T Dev board(h8homlet), this uart0 serial connector is exposed. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add basic H3 supportJens Kuske2015-11-22-0/+1
| | | | | | | | Add initial sun8i H3 support, only uart + mmc are supported for now. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: nand: Add pinmux and clock settings for NAND supportKarol Gugala2015-08-08-0/+1
| | | | | | | | | | To enable NAND flash in sunxi SPL, pins 0-6, 8-22 and 24 on port C are configured. Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add support for UART0 in PB pin group on A33Chen-Yu Tsai2015-07-05-0/+1
| | | | | | | | The A33 adds a pinmux function for UART0 in the PB pin group. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Revert "sunxi/nand: Add support to the SPL for loading u-boot from internal ↵Ian Campbell2015-06-28-2/+0
| | | | | | | | | | | | | | NAND memory" This reverts commit f76eba38b3eda905ff3bdc18dd1240d3dcbc6e5a. This patch did not have a full and proper copyright/S-o-b chain. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Conflicts: include/configs/sun6i.h include/configs/sun8i.h
* sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memoryDaniel Kochmański2015-05-29-0/+2
| | | | | | | | | | | This commit adds support to the sunxi SPL to load u-boot from the internal NAND. Note this only adds support to access the boot partitions to load u-boot, full NAND support to load the kernel, etc. from the nand data partition will come later. Signed-off-by: Roy Spliet <r.spliet@ultimaker.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sun9i: Basic sun9i (A80) supportHans de Goede2015-05-29-0/+1
| | | | | | | Add initial sun9i (A80) support, only uart + mmc are supported for now. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: add support for UART2 on A23/A33Laurent Itti2015-05-19-0/+1
| | | | | | | | | | Add support for UART2 (2-pin version but note that RTS/CTS pins are available pn that port for possible future use), can be selected in config by using CONFIG_CONS_INDEX=3 Signed-off-by: Laurent Itti <laurentitti@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: axp: Remove non driver-model support from the axp gpio codeHans de Goede2015-05-04-7/+0
| | | | | | | | | | | | | | Now that all sunxi boards are using driver-model for gpio (*), we can remove the non driver-model support from the axp gpio code, and the glue to call into the axp gpio code from the sunxi_gpio non driver-model code. *) For the regular u-boot build, SPL still uses non driver-model gpio for now, but the SPL never uses axp gpios support and we were already not building axp-gpio support for the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Add driver-model support to the axp_gpio codeHans de Goede2015-05-04-2/+4
| | | | | | | | | | Add driver-model support to the axp_gpio code, note that this needs a small tweak to the driver-model version of sunxi_name_to_gpio to deal with the vbus detect and enable pins which are not standard numbered gpios. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Move axp gpio code to a separate axpi-gpio driverHans de Goede2015-05-04-0/+13
| | | | | | | | | | | | | | | | | | | | Move the axp-gpio code out of the drivers/power/axp*.c code, and into a new separate axpi-gpio driver. This change drops supports for the gpio3 pin on the axp209, as that requires special handling, and no boards are using it. Besides cleaning things up by moving the code to a separate driver, as a bonus this change also adds support for the (non vusb) gpio pins on the axp221 and the gpio pins on the axp152. The new axp-gpio driver gets its own Kconfig option, and is only enabled on boards which need it. Besides that it only gets enabled in the regular u-boot build and not for the SPL as we never need it in the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Complete i2c support for each supported platformPaul Kocialkowski2015-04-15-1/+14
| | | | | | | | | | | Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Complete mmc pin mux for each supported platform, configured with KconfigPaul Kocialkowski2015-04-15-1/+12
| | | | | | | | | | | | | Sunxi platforms have different possible mmc pin mux setups (except for mmc0), which are different across platforms. This lets users configure which is used through the CONFIG_MMC*_PINS Kconfig options. This is especially relevant when a second (in addition to mmc0) port is used and CONFIG_MMC_SUNXI_SLOT_EXTRA is enabled. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: GPIO pin mux hardware-feature-specific function index definesPaul Kocialkowski2015-04-15-41/+19
| | | | | | | | | | | Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* power: axp221: Virtual VBUS detect and enable GPIOs to replace separate logicPaul Kocialkowski2015-04-15-0/+4
| | | | | | | | | This converts the VBUS detection and enable logic to GPIO instead of separate axp functions and checks that have to be used aside usual GPIO functions. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: gpio: Indentation fixPaul Kocialkowski2015-04-15-2/+2
| | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: rsb: Add sun9i (A80 support)Hans de Goede2015-02-02-0/+9
| | | | | | | Add support for the A80 to the rsb code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: video: Add lvds supportHans de Goede2015-01-14-0/+1
| | | | | | | Add support for lvds lcd panels Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* sunxi: video: Add lcd output supportHans de Goede2015-01-14-0/+2
| | | | | | | | Add lcd output support, see the new Kconfig entries and doc/README.video for how to enable / configure this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Add support for gpio pins on the AXP209 pmicHans de Goede2015-01-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | Some boards use GPIO-s on the pmic, one example of this is the A13-OLinuXino board, which uses gpio0 of the axp209 for the lcd-power signal. This commit adds support for gpio pins on the AXP209 pmic, the sunxi_gpio.c changes are universal, adding gpio support for the other AXP pmics (when necessary) should be a matter of adding the necessary axp_gpio_foo functions to their resp. drivers, and add "#define AXP_GPIO" to their header file. Note this commit only adds support for the non device-model version of the gpio code, patches for adding support to the device-model version are very welcome. The string representation for these gpio-s is AXP0-#, the 0 in the AXP0 prefix is there in case we need to support gpio-s on more then 1 pmic in the future. At least A80 boards have 2 pmics, and we may end up needing to support gpio-s on both. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Properly sort mux defines by port numberHans de Goede2015-01-14-5/+5
| | | | | | | | Move a few mux defines around so that all the mux defines are properly sorted by port number. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add support for the rsb (Reduced Serial Bus)Hans de Goede2015-01-14-0/+2
| | | | | | | | | | | | sun8i (A23) introduces a new bus for communicating with the pmic, the rsb, the rsb is also used to communicate with the pmic on the A80, and is documented in the A80 user manual. This commit adds support for this based on the rsb driver from the allwinner u-boot sources. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: s/SUNXI_*P2WI*/SUN6I_*P2WI*/Hans de Goede2015-01-14-2/+2
| | | | | | | | The p2wi interface is only available on sun6i, adjust the gpio pinmux and base address defines for it to reflect this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add gmac support for sun6i boardsHans de Goede2014-11-25-0/+1
| | | | | | | Hookup the gmac found on the sun6i / A31 SoCs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+3
| | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* dm: sunxi: Add pinmux functions which take a bank parameterSimon Glass2014-11-05-1/+3
| | | | | | | | | | With driver model we will have access to a bank pointer, so we want to use it rather than converting back to a number, and then back to a bank pointer. Add functions to provide this feature. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?IIan Campbell2014-11-05-1/+1
| | | | | | | | | | | Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: sunxi: Add support for using R_UART as consoleChen-Yu Tsai2014-10-24-0/+3
| | | | | | | | | | The A23 only has UART0 muxed with MMC0. Some of the boards we encountered expose R_UART as a set of pads. Add support for R_UART so we can have a console while using mmc. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* ARM: sunxi: Add support for R_PIO gpio banksHans de Goede2014-10-24-2/+29
| | | | | | | | | | | | | | | The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO or R_PIO, which handles pin banks L and beyond. Also add a clear description about SUNXI_GPIO_BANKS, stating it only counts the number of pin banks in the _main_ pin controller. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: expanded commit message] [wens@csie.org: add pin bank M and expand comments] [wens@csie.org: add comment on SUNXI_GPIO_BANKS macro] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* ARM: sunxi: Add sun8i (A23) UART0 pin mux supportChen-Yu Tsai2014-10-24-0/+6
| | | | | | | UART0 pin muxes on the A23 have a different function value. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Use PG3 - PG8 as io-pins for mmc1Hans de Goede2014-10-24-0/+2
| | | | | | | | | | None of the known sunxi devices actually use mmc1 routed through PH, where as some devices do actually use mmc1 routed through PG, so change the routing of mmc1 to PG. If in the future we encounter devices with mmc1 routed through PH, we will need to change things to be a bit more flexible. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* ARM: sun6i: Define UART0 pins for A31Chen-Yu Tsai2014-10-24-0/+3
| | | | | | | UART0 is the default debug/console UART on the A31. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: add gpio driverIan Campbell2014-07-18-0/+2
| | | | | | | | | | | | | | | This patch enables CONFIG_CMD_GPIO for the Allwinner (sunxi) platform as well as providing the common gpio API (gpio_request/free, direction in/out, get/set etc). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Henrik Nordström <henrik@henriknordstrom.net> Cc: Tom Cubie <Mr.hipboi@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: add sun7i pinmux and gpio supportIan Campbell2014-05-25-0/+147
This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
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