Commit message (Expand) | Author | Age | Lines | |
---|---|---|---|---|
* | socfpga: initialize designware ethernet | Pavel Machek | 2014-08-30 | -0/+2 |
* | socfpga: Fix SOCFPGA build error for Altera dev kit | Chin Liang See | 2014-08-29 | -0/+2 |
* | socfpga: fix clock manager register definition | Pavel Machek | 2014-08-29 | -43/+49 |
* | socfpga: Adding Scan Manager driver | Chin Liang See | 2014-07-05 | -0/+91 |
* | socfpga: Adding DesignWare watchdog support | Chin Liang See | 2014-07-05 | -0/+1 |
* | socfpga: Adding Clock Manager driver | Chin Liang See | 2014-04-07 | -0/+206 |
* | socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA | Chin Liang See | 2014-01-09 | -0/+77 |
* | socfpga: Adding Freeze Controller driver | Chin Liang See | 2013-12-03 | -0/+50 |
* | socfpga: Adding System Manager driver | Chin Liang See | 2013-10-07 | -0/+23 |
* | socfpga: Creating driver for Reset Manager | Chin Liang See | 2013-09-06 | -3/+7 |
* | Add GPL-2.0+ SPDX-License-Identifier to source files | Wolfgang Denk | 2013-07-24 | -48/+4 |
* | ARM: Add Altera SOCFPGA Cyclone5 | Dinh Nguyen | 2012-10-04 | -0/+119 |