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* drivers: usb: musb: adopt musb backend driver to driver modelMugunthan V N2016-12-02-3/+3
| | | | | | | | | | Currently all backend driver ops uses hard coded physical address, so to adopt the driver to DM, add device pointer to ops call backs so that drivers can get physical addresses from the usb driver priv/plat data. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* TI: Rework SRAM definitions and maximumsTom Rini2016-09-06-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
* armv7: armv7: introduce set_gpmc_cs0Ladislav Michl2016-07-22-0/+1
| | | | | | Allow boards to runtime detect flash type. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* armv7: make gpmc_cfg constLadislav Michl2016-07-22-2/+2
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* armv7: add reset timeout to identify_nand_chipLadislav Michl2016-07-22-1/+1
| | | | | | | | | | identify_nand_chip hangs forever in loop when NAND is not present. As IGEPv2 comes either with NAND or OneNAND flash, add reset timeout to let function fail gracefully allowing caller to know NAND is not present. On NAND equipped board, reset succeeds on first read, so 1000 loops seems to be safe timeout. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* ARM: omap-common: Add device type to CPU stringDaniel Allred2016-05-27-6/+1
| | | | | | | | | | | | | | Update the CPU string output so that the device type is now included as part of the CPU string that is printed as the SPL or u-boot comes up. This update adds a suffix of the form "-GP" or "-HS" for production devices, so that general purpose (GP) and high security (HS) can be distiguished. Applies to all OMAP5 variants. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: Use a define for reboot reason offsetPaul Kocialkowski2016-03-15-0/+2
| | | | | | | | This introduces a define for the offset to the reboot reason, rather than hardcoding it. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: String-based reboot mode handlingPaul Kocialkowski2016-03-15-2/+2
| | | | | | | | This switches reboot mode handling to a string-based interface, that allows more flexibility to set a common interface with the next generations of OMAP devices. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap-common: Common function to display die id, replacing omap3-specific versionPaul Kocialkowski2015-10-22-1/+0
| | | | | | | | | This introduces omap_die_id_display to display the full die id. There is no need to store it in an environment variable, that no boot script is using anyway. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: omap_die_id supportPaul Kocialkowski2015-10-22-1/+0
| | | | | | | | This replaces the previous get_dieid definition with omap_die_id, that matches the common omap_die_id definition. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: Reboot mode supportPaul Kocialkowski2015-08-12-0/+7
| | | | | | | | | | | | | | Reboot mode is written in scratchpad memory before reboot in the form of a single char, that is the first letter of the reboot mode string as passed to the reboot function. This mechanism is supported on OMAP3 both my the upstream kernel and by various TI kernels. It is up to each board to make use of this mechanism or not. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-1/+0
| | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* omap: SPL boot devices cleanup and completionPaul Kocialkowski2015-07-27-8/+10
| | | | | | | This cleans up the SPL boot devices for omap platforms and introduces support for missing boot devices. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* omap-common: Common boot code OMAP3 support and cleanupPaul Kocialkowski2015-07-27-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces OMAP3 support for the common omap boot code, as well as a major cleanup of the common omap boot code. First, the omap_boot_parameters structure becomes platform-specific, since its definition differs a bit across omap platforms. The offsets are removed as well since it is U-Boot's coding style to use structures for mapping such kind of data (in the sense that it is similar to registers). It is correct to assume that romcode structure encoding is the same as U-Boot, given the description of these structures in the TRMs. The original address provided by the bootrom is passed to the U-Boot binary instead of a duplicate of the structure stored in global data. This allows to have only the relevant (boot device and mode) information stored in global data. It is also expected that the address where the bootrom stores that information is not overridden by the U-Boot SPL or U-Boot. The save_omap_boot_params is expected to handle all special cases where the data provided by the bootrom cannot be used as-is, so that spl_boot_device and spl_boot_mode only return the data from global data. All of this is only relevant when the U-Boot SPL is used. In cases it is not, save_boot_params should fallback to its weak (or board-specific) definition. save_omap_boot_params should not be called in that context either. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766Nishanth Menon2015-03-13-0/+1
| | | | | | | | | | | | RX51 has a secure logic which uses different parameters compared to traditional implementation. So, make the generic secure acr write over-ride-able by board file and refactor rx51 code to use this. While at it, enable the OMAP3 specific errata code for 454179, 430973, 621766. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1Nishanth Menon2015-03-13-1/+0
| | | | | | | | | | | | omap_smc1 is now generic enough to remove duplicate omap3_gp_romcode_call logic that omap3 introduced. As part of this change, move to using the generic lowlevel_init.S for omap3 as well. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCsNishanth Menon2015-03-13-0/+0
| | | | | | | | This is in preperation of using generic cross OMAP code. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: add some MUX definitions for upcoming cairoAlbert ARIBAUD \(3ADEV\)2015-01-29-2/+49
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* omap3: mmc: add 1.8v bias setting for MMC1Albert ARIBAUD \(3ADEV\)2015-01-29-0/+1
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* omap3: add SDRC settings for Samsung K4X51163PGAlbert ARIBAUD \(3ADEV\)2015-01-29-0/+43
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* omap3: make SDRC SHARING setting configurableAlbert ARIBAUD \(3ADEV\)2015-01-29-0/+1
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-10-27-2/+2
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| * omap3/am33xx: mux: fix several checkpatch issuesIgor Grinberg2014-10-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following checkpatch issues: CHECK: No space is necessary after a cast \#39: FILE: arch/arm/include/asm/arch-am33xx/mux.h:39: +#define PAD_CTRL_BASE 0x800 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \ CHECK: Avoid CamelCase: <CONTROL_PADCONF_JTAG_nTRST> \#284: FILE: arch/arm/include/asm/arch-omap3/mux.h:284: +#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C ERROR: space required after that ',' (ctx:VxV) \#446: FILE: arch/arm/include/asm/arch-omap3/mux.h:446: +#define MUX_VAL(OFFSET,VALUE)\ ^ Cc: Raphael Assenat <raph@8d.com> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Nishanth Menon <nm@ti.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefan Roese <sr@denx.de>
* | omap3: board: add missing include and protoJeroen Hofstee2014-10-25-0/+1
|/ | | | Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* ARM: omap: clean redundant PISMO_xx macros used in OMAP3pekon gupta2014-07-25-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PISMO_xx macros were used to define 'Platform Independent Storage MOdule' related GPMC configurations. This patch - Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided by current u-boot infrastructure. - Removes unused redundant macros, which are no longer required after merging of common platform code in following commit commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform +-----------------+-----------------------------------------------------------+ | Macro | Reason for removal | +-----------------+-----------------------------------------------------------+ | PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so | | | configuring GPMC chip-select for smallest allowable | | | segment (GPMC_SIZE_16M) is enough. | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of | | | 128MB (GPMC_SIZE_128M) | +-----------------+-----------------------------------------------------------+ +-----------------+-----------------------------------------------------------+ | PISMO1_NOR | Unused Macros | | PISMO1_NAND | | | PISMO2_CS0 | | | PISMO2_CS1 | | | PISMO1_ONENAND | | | PISMO2_NAND_CS0 | | | PISMO2_NAND_CS1 | | | PISMO1_NOR_BASE | | | PISMO1_NAND_BASE| | | PISMO2_CS0_BASE | | +-----------------+-----------------------------------------------------------+ Signed-off-by: Pekon Gupta <pekon@ti.com>
* omap3: remove remnant macros GPMC_NAND_ECC_LP_x8_LAYOUT and ↵pekon gupta2014-06-06-8/+0
| | | | | | | | | | | GPMC_NAND_ECC_LP_x16_LAYOUT OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros to configure GPMC controller for x7 or x8 bit device connected to its interface. Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above macros can be completely removed. Signed-off-by: Pekon Gupta <pekon@ti.com>
* ARM: omap: merge GPMC initialization code for all platformpekon gupta2014-05-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like; - parallel NOR flash - parallel NAND flash - OneNand flash - SDR RAM - Ethernet Devices like LAN9220 Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms. Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device Signed-off-by: Pekon Gupta <pekon@ti.com> [trini: define GPMC_SIZE_256M for omap3] Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: beagle-xm: generate fake USB ethernet MAC address from dieidNishanth Menon2014-04-17-0/+1
| | | | | | | | Similar to OMAP5uEVM, PandaBoard, BeagleBoard-XM has a USB based ethernet without MAC address embedded. So fake a MAC address following the similar strategy used on OMAP5 and PandaBoard family. Signed-off-by: Nishanth Menon <nm@ti.com>
* omap3/sys_info: provide interface to read die idNishanth Menon2014-04-17-0/+1
| | | | | | | introduce get_die_id() function which allows generation of information such as fake MAC address from the processor ID code. Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: OMAP: hide custom bit manipulation function sr32()Wolfgang Denk2014-04-17-1/+0
| | | | | | | | | | The only remaining user of the custom bit manipulation function sr32() is arch/arm/cpu/armv7/omap3/clock.c, so make it a static function in that file to prepare complete removal. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* spl: Fix guardian macros in spl.hMarek Vasut2014-03-28-1/+1
| | | | | | | | | Fix the macros guarding the spl.h header for various platforms. Due to a typo and a propagation of it, the macros went out-of-sync with their ifdef check, so fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
* mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-1/+1
| | | | | | | | | omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers ↵pekon gupta2014-03-04-53/+2
| | | | | | | | | | | | | | | into common omap_gpmc.h Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related defines and declarations scattered in SoC platform specific header files like include/asm/arch-xx/cpu.h However, GPMC hardware remains same across all platforms thus this patch merges GPMC data scattered across different arch-xx specific header files into single header file include/asm/arch/omap_gpmc.h Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* mtd: nand: omap: remove redundant platform specific header: arch-xx/omap_gpmc.hpekon gupta2014-03-04-36/+10
| | | | | | | | | | | | | | | | | | | Currently there are two sets of omap_gpmc.h header files (a) arch/arm/include/asm/omap_gpmc.h common header file for all platforms, containing defines and declarations used by GPMC NAND driver. (b) arch/arm/include/asm/arch-xx/omap_gpmc.h SoC platform specific header file containing defines like ECC layout. This patch removes platform specific arch-xx/omap_gpmc.c because: - GPMC hardware engine is common for all SoC platforms hence only (a) is enough - ECC layout is now defined in omap_nand.c driver itself based on ecc-scheme selected. Hence all ECC layout declarations in (b) are redundant. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* ARM: OMAP3: Rename OMAP3_PUBLIC_SRAM_* to NON_SECURE_SRAM_*Enric Balletbò i Serra2014-01-24-3/+3
| | | | | | | | | | | | Other TI processors like am33xx, omap4 and omap5 have called these variables as NON_SECURE_SRAM_*, shouldn't be a big problem rename these variables to be coherent. One reason more to rename these variables is to have the possibility of any OMAP3 board to use the ti_armv7_common.h include as the NON_SECURE_SRAM_END is used to define the CONFIG_SYS_INIT_SP_ADDR variable. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-10-4/+5
|\ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
| * omap3_dss: define DSS_ONOFFNikita Kiryanov2013-11-12-4/+5
| | | | | | | | | | | | | | | | | | | | | | Add DSS_ONOFF to polarity defines Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Anatolij Gustschin <agust@denx.de>
* | arm: omap3: Enable clocks for peripherals only if they are usedMichael Trimarchi2013-12-06-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch change the per_clocks_enable() function used in OMAP3 code to enable peripherals clocks. Only required clock should be activated. So if the board use the uart(x) as a console we need to activate it. The Board's config should include define to enable every subsystem that the board use. For a complete list of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER should be checked. Right now the bootloader can enable and disable clocks for: uart(x) using CONFIG_SYS_NS16550 gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 } i2c bus using CONFIG_DRIVER_OMAP34XX_I2C. Not required gptimer(x) and mcbsp(x) for booting are disabled by default and are not supported by any define. Their activation need to included in the per_clocks_enable if the peripheral is included. Not booting board should enable the peripheral clock connected to their driver Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* | arm: omap3: Add uart4 omap3 adddressMichael Trimarchi2013-12-04-0/+1
|/ | | | | | This patch add the OMAP34XX_UART4 memory address Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-2/+0
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| * arm: omap3: fix SRAM copy and execution sequenceAlbert ARIBAUD2013-08-28-2/+0
| | | | | | | | | | | | | | Fix size calculation in copy of go_to_speed into SRAM. Use SRAM_CLK_CODE in call to SRAM-based go_to_speed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | SPDX-License-Identifier: fixing some problematic GPL-2.0 filesWolfgang Denk2013-08-19-18/+1
|/ | | | | | | | | | | | | | | | | Unlike the other patches in this series so far, this commit fixes a ambiguity in the license terms for some OMAP files: the code was originally derived from the Linux kernel sources, where it was clearly marked as GPL-2.0 (i. e. without the "or later" part), but the U-Boot version had a GPL-2.0+ file header added, apparently without permission / relicensing from the original authors of the code. Insert a GPL-2.0 SPDX-License-Identifier to fix this. Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Tom Rix <Tom.Rix@windriver.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com>
* ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx ↵Naumann Andreas2013-08-15-0/+23
| | | | | | | | | | | | | | according to errata sprz318e. In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup. So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only. Also, the FSEL registers exist no longer, so removed them from init. Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel. Signed-off-by: Andreas Naumann <anaumann@ultratronik.de> [trini: Add extern to <asm/arch-omap3/clock.h> Signed-off-by: Tom Rini <trini@ti.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-267/+19
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5Axel Lin2013-07-02-0/+2
| | | | | | | | | | | | | | | | The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla2013-06-10-0/+0
| | | | | | | To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* OMAP3+: introduce generic ABB supportAndrii Tseglytskyi2013-06-10-0/+7
| | | | | | | | | | | | | | | | | Adaptive Body Biasing (ABB) modulates transistor bias voltages dynamically in order to optimize switching speed versus leakage. Adaptive Body-Bias ldos are present for some voltage domains starting with OMAP3630. There are three modes of operation: * Bypass - the default, it just follows the vdd voltage * Foward Body-Bias - applies voltage bias to increase transistor performance at the cost of power. Used to operate safely at high OPPs. * Reverse Body-Bias - applies voltage bias to decrease leakage and save power. Used to save power at lower OPPs. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
* OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMCTom Rini2013-04-08-0/+3
| | | | | | | | | | | | | | | In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because in addition to being nonsensical, it leads to a hang. This is why we have a test currently for the boot mode being within range. The problem however is that on some platforms we get MMC2_2 as the boot mode and not the defined value for MMC2, and in others we get the value for MMC2_2. This is required to fix eMMC booting on omap5_uevm. Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC). Signed-off-by: Tom Rini <trini@ti.com>
* omap_gpmc: change nandecc commandAndreas Bießmann2013-04-08-1/+1
| | | | | | | | | | | | | With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernelAndreas Bießmann2013-04-08-0/+17
| | | | | | | | | | | | This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-11-15 11:57:49 +0000