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* MLK-10215 Add elan init in i.MX6SL-EVK boardl5.0.0_1.0.0-betaHaibo Chen2015-03-05-1/+3
| | | | | | | | | | | | | | | | | | | | EPDC board contain a elan touch screen, this screen is a i2c slave. If this EPDC board connect to i.MX6SL-EVK board, after uboot boot up, if we do i2c operation, like i2c probe, then the i2c bus block. This is due to the elan touch screen i2c slave. This device needs to do some initialization opearation before its i2c operation, otherwise this i2c device pull down the i2c clk line, and make the i2c bus hang. This means elan needs a special flow on i2c before its address is acked, otherwise the i2c bus will be hang. This patch is a workaround, it add a void function which is defined as a weak symbol in i2c driver, and it is called before every i2c operation. In mx6slevk, this function was overwrite to execute elan initialization. So that, for mx6slevk board, it will initialize elan before every i2c operation, but for other boards, it just work as before. Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
* MLK-9891-1: ARM: imx6: split WDOG_B setting from set_anatop_bypass() functionRobin Gong2014-12-18-0/+1
| | | | | | | | | We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to reboot whole board, so split these code to independent function so that board file can call it freely. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 93d457e4c601ee5266bc30b7dfa5fa1bbfa8500a)
* MLK-9898 imx:mx6 fix ana2 offset of fuse bank1Peng Fan2014-11-24-0/+2
| | | | | | | | | | According to RM, there is 16bytes between offset ana1 and offset ana2. So should add 3 int hole 'u32 reserved[3]' between ana1 and ana2. Also add the reserved bytes for ana2 in this patch. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit b0fd5f272895dfb0891872c099df7eef1519f729)
* MLK-9705 imx: mx6sx: Set the pad setting SION for I2C3 pinsYe.Li2014-10-20-2/+2
| | | | | | When set the pinmux to I2C functionality, the SION is required to enabled. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00332535 imx: mx6sx: Remove WEIM plugin work around for TO 1.2 and higherYe.Li2014-09-23-1/+7
| | | | | | | | ROM fixes the WEIM plugin issue in TO 1.2. The work around for hacking WEIM base address to ROM variable is not needed. To avoid hacking useful data, remove the work around for TO 1.2 and higher revisions. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00331706-2 imx: mx6sl: Add perclk_clk_sel bit define in CCMYe.Li2014-09-18-0/+2
| | | | | | | The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00330792 imx: mx6: Merge anatop registers to CCM structureYe.Li2014-09-10-147/+97
| | | | | | | | | | THe anatop registers structure is duplicated with CCM structure at PLL fields. Since we are suggested not to use the name "anatop" any longer, merge the anatop registers to the CCM structure "mxc_ccm_reg" and use CCM to replace anatop. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00326277-2 imx6: watchdog: use WDOG_B mode for wdog reset in ldo-bypass modeRobin Gong2014-08-26-1/+1
| | | | | | In ldo-bypass mode, we need trigger WDOG_B pin to reset pmic in ldo-bypass mode. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00326277-1: imx6: ldo_bypass: fix VDDARM voltage setting violate datasheetRobin Gong2014-08-26-1/+3
| | | | | | | | | Current only set VDDARM_IN@1.175V/VDDSOC_IN@1.175V before ldo bypass switch. So untile ldo bypass switch happened, these voltage setting is set in ldo-enable mode. But in datasheet, we need 1.15V + 125mV = 1.275V for VDDARM_IN. We need to downgrade cpufreq to 400Mhz and restore after ldo bypass mode switch. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00325255 pcie:enable pcie support on imx6sx sdRichard Zhu2014-07-31-1/+12
| | | | | | | | | | | | | | Enable pcie support in uboot on imx6sx sd boards - enable_pcie_clock should be call before ssp_en is set, since that ssp_en control the phy_ref clk gate, turn on it after the source of the pcie clks are stable. - add debug info - add rx_eq of gpr12 on imx6sx - there are random link down issue on imx6sx. It's pcie ep reset issue. solution:reset ep, then retry link can fix it. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00322860 iMX6SX: Add function to check M4 status before bootingYe.Li2014-07-17-0/+1
| | | | | | | Add new function "arch_auxiliary_core_check_up" to check whether M4 is already up. Therefore, avoid starting M4 again when it is running. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319003 iMX6SX:HAB: Fixed build break when enabling secure bootYe.Li2014-06-18-2/+2
| | | | | | | | | | | | | | | When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform due to two problems. 1. The imximage tool in v2014 changes the command name of "SECURE_BOOT" to "CSF". Must update it in imximage.cfg scripts. 2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API definitions are not defined and cause compile errors. (HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW, HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-77 mx6 soc: Add vadc power up/down functionYe.Li2014-06-17-0/+12
| | | | | | | Add vadc power up/down function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-76 mx6 clock: Add vadc clock enable functionYe.Li2014-06-17-0/+1
| | | | | | | Add vadc clock enable function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-71 iMX6SX Update registers and clock for displayYe.Li2014-06-17-1/+246
| | | | | | Add registers and clock functions to enable/set LCDIF clock and LVDS. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-59 iMX6SX: Add RDC mappings of masters and peripheralsYe.Li2014-06-17-0/+159
| | | | | | | Add the definitions for the RDC mappings on iMX6SX and include this file to "imx-rdc.h" Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-58 RDC: Add an iMX platform driver for RDC-SEMAYe.Li2014-06-17-0/+36
| | | | | | | | | | | | | | The RDC driver provides interfaces for setting peripherals and masters at BSP initialization, before using the peripherals driver. Another interfaces for lock/unlock RDC semaphore and permission check. The driver assumes boot CPU which runs u-boot is in Domain 0 (default setting on boot). Users should not set it to other domains. The peripherals ID and masters ID may change on different chip, each should provide definitions of the IDs and be included in "imx-rdc.h". Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-57 iMX6SX: Add M4 boot support at soc levelYe.Li2014-06-17-0/+5
| | | | | | | | | Implement the override function "arch_auxiliary_core_up" to boot Cortex-M4 by executing command "bootaux". The parameter "boot_private_data" points to fields where stores the stack address and PC address for M4 to run. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-55 iMX6SX: add debug monitor supportYe.Li2014-06-17-0/+17
| | | | | | | | | | | Debug monitor will print out last failed AXI access info when system reboot is caused by AXI access failure, only works when debug monitor is enabled. Enable this module on i.MX6SX. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-54 iMX6SX/SL: Modify SOC to support two ENETYe.Li2014-06-17-1/+32
| | | | | | | | | | | | | | | | | | | | | iMX6SX has different enet system clocks with iMX6SL, and has two ENET controllers. So update clocks and soc APIs accordingly to support this features. 1. Modify the clock API "enable_enet_clock" to enable enet system clock for enet controllers. 2. Enet RGMII TX clock source may come from external or internal PLL. By default, use the external phy CLK_25M output as TX clock source. When using internal PLL as source, the function enable_fec_anatop_clock must be called to enable clock for each enet controller. 3. Modify the MAC address function "imx_get_mac_from_fuse" to get either ENET MAC address. 4. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz reference clock. 5. Modify imx6slevk BSP to fit the new APIs. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-51 iMX6SX: Add QuadSPI clock enable functionYe.Li2014-06-17-0/+3
| | | | | | | Enable the clock for QuadSPI controllers. Must be called at initialization. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-48 iMX6SX: Add iMX6SX SoC supportYe.Li2014-06-17-13/+2093
| | | | | | | | | | | Adding clks, pinmux, memory map, etc for iMX6SoloX. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-44 imx6:USB: Update EHCI driver for OTG lines compatibilityYe.Li2014-06-17-12/+3
| | | | | | | | | | | To be compatible with more USB otg lines which has micro port B to connect imx6 OTG port when imx6 working at host mode, remove the checking for the OTG ID with the init type. Only use the init type for the power and controller initialization. Use same EHCI register base address for various imx6 platform. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315499-17 ARM:imx6sl:evk Add SPI NOR flash boot and access supportNitin Garg2014-06-13-0/+5
| | | | | | | | | | | Add BSP codes to support SPI NOR flash read, write and erase by using "sf" command. In addition, add a new configuration "mx6slevk_spinor" for building the uboot that can be booted from SPI NOR flash and stored the environments variables in it. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-15 ARM:imx6sl:evk Add USB HOST supportNitin Garg2014-06-13-1/+4
| | | | | | | | Enable the USB EHCI for the imx6slevk board. Add VBUS control pin settings and related BSP codes. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-12: ARM: MSL: add i2c0 support for imx6sl evkNitin Garg2014-06-13-0/+5
| | | | | | | | - Add i2c0 support for imx6sl evk platform. - Read pmic device ID and revsion ID. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-11 ARM:imx6 Change static environment SD/MMC storage to dynamicNitin Garg2014-06-13-0/+22
| | | | | | | | | | | | | | | | | | | imx6 boards (sabresd, sabreauto, arm2 and slevk) have multiple SD/MMC ports to boot. But current uboot hard code the SD/MMC port for environment variables storage. So if customer changes a port without modifying the configuration "CONFIG_SYS_MMC_ENV_DEV", error will issue at saving and loading environment. Implement a mechanism to detect SD/MMC port from SRC SMBR register, and override the default "mmc_get_env_devno". The "board_late_mmc_env_init" is used to set "mmcdev" when booting from SD/MMC port. Finally after booting from SD/MMC, the environment storage device and "mmcdev" are both set to current SD/MMC port. Customers don't need to re-build the image if booting from different SD/MMC port. This patch also adds SD1 and SD3 support to imx6slevk BSP, and adds support for sabreauto SD1 slot on base board. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-10 ARM:imx6:sabresd/sabreauto Add android fastboot supportingNitin Garg2014-06-13-0/+1
| | | | | | | | | | | | | | | | | | Support android features: fastboot, booti command and recovery for sabresd SD, sabresd eMMC, sabreauto SD, sabreauto NAND. For all booting media (SD, eMMC, NAND), inherits the partitions layout from v2009.08. Fastboot will detect the booting media to replace hardcoding fastboot device. SATA is not supported. FDT is supported to use the "unused" fields in bootimg header which requires the FDT to be combined into the boot.img. For non-FDT boot.img, the "unused" fields should left to NULL and is compatible to boot. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-9: ARM:iMX6SL EVK: Add keyboard supportNitin Garg2014-05-27-0/+9
| | | | | | | i.MX6sl evk has keyboards on the board, so add mxc_keyb driver to support key press checking. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-8 Auto check if boot from usbNitin Garg2014-05-27-0/+5
| | | | | | | | If boot from usb, reset environment to default value. Auto apply mfgtools setting and boot mfgtools kernel. Signed-off-by: Frank Li <Frank.li@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-7 Add EPDC splash screen for MX 6DL SabreSD and 6SL EVKNitin Garg2014-05-27-0/+48
| | | | | | | | | | | | | | | | | Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board. - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. - EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly (hang), since some additional content on the boot device (waveform file) is required for EPDC splash to work correctly. Please refer to Linux Reference Manual for how to flash WAVEFORM file. Signed-off-by: Robby Cai <R63905@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-6 ARM:imx6: Add USB gadget driver imx_udc to support Android ↵Nitin Garg2014-05-27-0/+492
| | | | | | | | | | | | | | fastboot Android fastboot leans on the USB gadget driver to communicate with host. Porting the imx_udc driver from v2009.08 with two changes: adding resource/memory release APIs and replacing the uncached memory with cache flush&invalidate operations. Pins and Clocks initialization are added to support boards: mx6qdlsabresd, mx6qdlsabreauto, mx6slevk Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-5: Support i.MX6 1.2GHz via LDO bypassNitin Garg2014-05-27-4/+15
| | | | | | | | Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz, enable LDO bypass and setup PMIC voltages. LDO bypass is dependent on the flatten device tree file. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-4: Add support for i.MX6 Plugin imagesNitin Garg2014-05-27-0/+127
| | | | | | | Support generating plugin images. Make sure not to effect the size of DCD images. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-3: Support i.MX6 HAB authentication of kernel imageNitin Garg2014-05-27-6/+22
| | | | | | | Support HAB authentication of kernel or secondary images via bootm or hab_auth_img u-boot command. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-1: Add i.MX6 CPU temperature sensor supportNitin Garg2014-05-27-2/+551
| | | | | | Support CPU temperature sensors on i.MX6 SoC. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-02-21-4/+5
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| * spi: mxc_spi: i.MX6 DL/S have only 4 eCSPI controllerMarkus Niebel2014-02-18-1/+1
| | | | | | | | | | | | | | | | The dual lite and solo variant have only 4 SPI controller. respect this in the MXC_SPI_BASE_ADRESSES macro Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * spi: spi-mxc: add defines for clk inactive state for ECSPIMarkus Niebel2014-02-18-3/+4
| | | | | | | | | | | | | | | | | | Provide define for the SCLK_CTL field of the config reg of ECSPI. While at it, oder the defines to improve readability and make adding more defines easier. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | imx6 SION bit has to be on for the pins that are used as ENET_REF_CLKAndy Ng2014-02-19-6/+6
| | | | | | | | Signed-off-by: Andy Ng <andreas2025@gmail.com>
* | mx6: Enable L2 cache supportFabio Estevam2014-02-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add L2 cache support and enable it by default. Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | imx: Introduce a header for the imx cpu versionsFabio Estevam2014-02-11-7/+1
| | | | | | | | | | | | | | Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header files, introduce a common header to centralize such definitions. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | ARM: mx6: Add PCI express driverMarek Vasut2014-01-26-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the PCIe block in RC mode only, the EP mode is NOT supported. The driver is tested with the Intel e1000 NIC driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | ARM: mx6: Add PCI express clock configurationMarek Vasut2014-01-26-0/+1
|/ | | | | | | | | | | | | | | | Split the SATA clock enabling function and add PCI express clock enabling function. The SATA clock enabling function starts up the 100MHz SATA reference PLL in ENET_PLL register, but the code can be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull this code into separate function. Moreover, add the PCIe clock enabling code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* mx6: Revert "mx6: soc: Disable VDDPU regulator"Fabio Estevam2014-01-17-24/+0
| | | | | | | | | Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang for people using FSL kernel 3.0.35 and 3.10, so revert it for now. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Reported-by: Pierre Aubert <p.aubert@staubli.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Add initial support for the Hummingboard soloFabio Estevam2014-01-15-0/+4
| | | | | | | | | | | | | | | | SolidRun has designed the Hummingboard board based on mx6q/dl/solo. Add the initial support for the mx6 solo variant. More information about this hardware can be found at: http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware (Carrier-One was the previous name of Hummingboard). Based on the work from Jon Nettleton <jon.nettleton@gmail.com>. Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()Fabio Estevam2014-01-15-1/+8
| | | | | | | | | | Provide an argument to enable_fec_anatop_clock() to specify the clock frequency that will be generated. No changes are made to mx6slevk, which uses the default 50MHz fec clock. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6: soc: Disable VDDPU regulatorFabio Estevam2014-01-02-0/+24
| | | | | | | | | As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator in order to save power. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: soc: Staticize set_vddsoc()Fabio Estevam2014-01-02-2/+0
| | | | | | set_vddsoc() is not used anywhere else, so make it static. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX6 (DQ/DLS): use macros for mux and pad declarationsEric Nelson2013-12-17-2106/+2118
| | | | | | | | | | | | | | | | | | | | This allows the use of either or both declarations from the files mx6q_pins.h and mx6dl_pins.h. All board files should include <asm/arch/mx6-pins.h> with one of the following defined in boards.cfg MX6Q - for boards targeting i.MX6Q or i.MX6D MX6DL - for boards targeting i.MX6DL MX6S - for boards targeting i.MX6S MX6QDL - for boards that support any of the above with run-time detection Pad declarations will be MX6_PAD_x for single-variant boards and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both processor classes. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
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