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* MX5: Modify the PLL decoding algorithmMarek Vasut2011-09-30-0/+14
| | | | | | | | | | The PLL decoding algorithm didn't take into account many configuration bits. Adjust it according to Linux kernel. Also, add PLL4 for MX53. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Tested-by: Jason Liu <Jason.hui@linaro.org>
* FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.hMarek Vasut2011-09-30-2/+0
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* MX5: make use of GPIO framework for MX5 processorStefano Babic2011-09-04-7/+35
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: MX51: PLL errata workaroundDavid Jander2011-09-04-0/+5
| | | | | | | | | | | | | This is a port of the official PLL errata workaround from Freescale to mainline u-boot. The PLL's in the i.MX51 processor can go out of lock due to a metastable condition in an analog flip-flop when used at high frequencies. This workaround implements an undocumented feature in the PLL (dither mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. Signed-off-by: David Jander <david@protonic.nl>
* MX5: Update to autogenerated asm-offsets.hStefano Babic2011-07-14-55/+18
| | | | | | | On i.MX5, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
* MX5: Introduce a function for setting the chip select sizeFabio Estevam2011-07-04-1/+6
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Add iomux structureFabio Estevam2011-07-04-0/+23
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Make the weim structure completeFabio Estevam2011-07-04-6/+125
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* SPI: mxc_spi: replace fixed offsets with structuresStefano Babic2011-02-02-0/+12
| | | | | | | | This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX5: Add initial support for MX53 processorLiu Hui-R643432011-02-02-158/+500
| | | | | | | | | | Add initial support for Freescale MX53 processor, - Add the iomux support and the pin definition, - Add the regs definition, clean up some unused def from mx51, - Add the low level init support, make use the freq input of setup_pll macro Signed-off-by: Jason Liu <r64343@freescale.com>
* imx: Get fec mac address from fuseLiu Hui-R643432010-11-21-0/+34
| | | | | | | The patch is to support getting FEC MAC address from fuse bank. Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de>
* mx51evk: support new relocation schemeShawn Guo2010-10-28-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to fix build breakage and support new relocation scheme for mx51evk. - Correct IRAM base address and add size definition The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than 0x1FFE8000 which is for older revision. - Include imx-regs.h in mx51evk.h Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be referred to. - Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE They are used to define init RAM layout. - Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been buried by Wolfgang's commit below 25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
* MX51: Add IPU driver for video supportStefano Babic2010-10-22-0/+11
| | | | | | | | | | | | The patch is a porting of the IPU Linux driver developed by Freescale to have framebuffer functionalities in u-boot. The port is based on kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f, as delivered by Freescale [i.MX BSP]. Most features are dropped from the original driver and only LCD support is the goal of this porting. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX5: rename mx51 to mx5Jason Liu2010-10-18-0/+1206
Rename mx51 to mx5 in order to support more mx51 like-style SOCs such as MX53 and the followings. Signed-off-by: Jason Liu <r64343@freescale.com>
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