arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	net: keystone_net: add Keystone2 K2L SoC support	Khoronzhuk, Ivan	2014-11-05	-0/+3
\| \| \| \| \| \| \| \|	The Keystone2 Lamar SoC uses the same keystone net driver. This patch adds opportunity to use it by K2L SoCs. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
*	net: keystone_serdes: add keystone K2L SoC support	Khoronzhuk, Ivan	2014-11-05	-0/+4
\| \| \| \| \| \| \| \| \|	Keystone2 Lamar SoC uses the same keystone SerDes driver. All Keystone2 EVM boards currently use SerDes driver, so move CONFIG_TI_KEYSTONE_SERDES to common configuration file. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
*	keystone2: enable OSR clock domain for K2L SoC	Hao Zhang	2014-10-23	-0/+24
\| \| \| \| \| \| \|	This patches enables the On-chip Shared Ram clock domain for K2L SoC. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
*	keystone2: msmc: add MSMC cache coherency support for K2L SOC	Hao Zhang	2014-10-23	-0/+3
\| \| \| \| \| \| \| \| \|	This patch adds Keystone II Lamar (K2L) SoC specific definitions to support MSMC cache coherency. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
*	ARM: keystone2: add K2L device hardware definitions	Hao Zhang	2014-10-23	-0/+74
	This patch adds hardware definitions specific to Keystone II Lamar (K2L) SoC. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>