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* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-2/+81
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| * arm, am335x: add watchdog supportHeiko Schocher2013-08-28-0/+20
| | | | | | | | | | | | | | | | Add TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * arm, am335x: add some missing registers and defines for lcd and epwm supportHeiko Schocher2013-08-28-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add missing register defines in struct cm_perpl epwmss0clkctrl epwmss2clkctrl lcdcclkstctrl - add missing register defines in struct cm_dpll clklcdcpixelclk - add struct pwmss_regs - add struct pwmss_ecap_regs - add LCD Controller base LCD_CNTL_BASE - add PWM0 controller base PWMSS0_BASE Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * arm, am33xx: add defines for gmii_sel_register bitsHeiko Schocher2013-08-28-0/+19
| | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
| * am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZETom Rini2013-08-28-1/+1
| | | | | | | | | | | | | | | | We had been allowing the max size to be larger than actually allowed by the ROM. Expand the commentary here to explain why we set these locations. Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://88.191.163.10/u-boot-armTom Rini2013-08-18-47/+1117
|\ \ | |/ | | | | | | | | | | | | | | | | Fixup an easy conflict over adding the clk_get prototype and USB_OTG defines for am33xx having moved. Conflicts: arch/arm/include/asm/arch-am33xx/hardware.h Signed-off-by: Tom Rini <trini@ti.com>
| * Add TI816X supportTENART Antoine2013-08-15-22/+624
| | | | | | | | | | | | Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
| * Prepare for TI816X : reuse existing code from TI814XTENART Antoine2013-08-15-1/+1
| | | | | | | | | | | | | | | | Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: AM43xx: Add header filesLokesh Vutla2013-08-15-20/+378
| | | | | | | | | | | | | | | | | | Adding the following data: -> Prcm structure -> Base addresses -> Pin mux structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: AM33xx: Move s_init to a common placeHeiko Schocher2013-08-15-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * ARM: AM33xx: Cleanup clocks layerLokesh Vutla2013-08-15-4/+26
| | | | | | | | | | | | | | | | | | | | | | Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * ARM: AM33xx: Cleanup dplls dataLokesh Vutla2013-08-15-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * am335x_evm: Add support for the NOR module on the memory capeSteve Kipisz2013-07-30-0/+9
| | | | | | | | | | | | | | | | | | | | | | This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Clean up config changes slightly] Signed-off-by: Tom Rini <trini@ti.com>
* | arm, am33xx: add clk_get prototypeHeiko Schocher2013-08-10-0/+1
|/ | | | | | | | | the clk_get() function is needed for the da8xx-fb video driver, which is used on the am3xx based siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-182/+15
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-1/+2
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5Axel Lin2013-07-02-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
| * am33xx: fix the ddr_cmdtctrl structureIlya Ledvich2013-07-02-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the wrong mapping between the DDR I/O control registers on AM33XX SoCs and the software representation in the SPL code. The most recent public TRM defines the following DDR I/O control registers offsets: * ddr_cmd0_ioctrl : offset 0x44E11404 * ddr_cmd1_ioctrl : offset 0x44E11408 * ddr_cmd2_ioctrl : offset 0x44E1140C * ddr_data0_ioctrl: offset 0x44E11440 * ddr_data1_ioctrl: offset 0x44E11444 While the struct ddr_cmdtctrl has also some reserved bits in the beginning. The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc. Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because of this mapping mismatch. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-22-0/+4
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| * arm, am33xx: move uart soft reset code to common placeHeiko Schocher2013-06-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
| * arm, am335x: make mpu pll config configurableHeiko Schocher2013-06-18-0/+1
| | | | | | | | | | | | | | | | upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher2013-06-18-0/+2
| | | | | | | | | | | | | | | | | | | | move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* | am33xx/omap4+: Move SRAM_SCRATCH_SPACE_ADDR to <asm/arch/omap.h>Tom Rini2013-06-06-0/+2
|/ | | | | | | | | | The location of valid scratch space is dependent on SoC, so move that there. On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR. On am33xx/ti814x we want to use what the ROM defines as "public stack" which is the area after our defined download image space. Correct the comment about and location of CONFIG_SPL_TEXT_BASE. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.cTom Rini2013-06-05-0/+1
| | | | | | | | | | | We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards. Reviewed-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Correct NON_SECURE_SRAM_START/ENDTom Rini2013-06-04-2/+2
| | | | | | | | | | | | | | | | | | | Prior to Sricharan's cleanup of the boot parameter saving code, we did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a problem that the address was pointing to the middle of our running SPL. Correct to point to the base location of the download image area. Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being used. As part of correcting these tests, make use of the fact that we've always been placing our stack outside of the download image area (which is fine, once the downloaded image is run, ROM is gone) so correct the max size test to be the ROM defined top of the download area to where we link/load at. Signed-off-by: Tom Rini <trini@ti.com> --- Changes in v2: - Fix typo noted by Peter Korsgaard
* ARM: OMAP: Make omap_boot_parameters common across socsSRICHARAN R2013-05-10-25/+0
| | | | | | | | omap_boot_parameters is same and defined for each soc. So move this to a common place to reuse it across socs. Signed-off-by: Sricharan R <r.sricharan@ti.com>
* Add DDR3 support for IGEP COM AQUILA/CYGNUS.Enric Balletbo i Serra2013-05-10-0/+17
| | | | | | These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* am33xx: add pll and clock support for TI814x CPSWMatt Porter2013-05-10-0/+1
| | | | | | | Enables required PLLs and clocks for CPSW on TI814x. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am335x: Really correct DDR timings on new BeagleBone partTom Rini2013-04-12-7/+7
| | | | | | | | The previous timings were done on the internal-only A1 board which has different DDR part than all later revs. The timings need a slight adjustment to be correct in all cases with later revs. Signed-off-by: Tom Rini <trini@ti.com>
* am335x: Update timings for the beaglebone againTom Rini2013-04-10-10/+10
| | | | | | | | After further testing we can run DDR at 400MHz so update the timings again. Tested-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com>
* am335x/ti814x: Correct MMC_BOOT_DEVICES_START/ENDTom Rini2013-04-09-0/+5
| | | | | | | | Given that on TI814x we have MMC1/2 swapped, we also need to swap them in MMC_BOOT_DEVICES_START/END Reported-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMCTom Rini2013-04-08-0/+3
| | | | | | | | | | | | | | | In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because in addition to being nonsensical, it leads to a hang. This is why we have a test currently for the boot mode being within range. The problem however is that on some platforms we get MMC2_2 as the boot mode and not the defined value for MMC2, and in others we get the value for MMC2_2. This is required to fix eMMC booting on omap5_uevm. Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC). Signed-off-by: Tom Rini <trini@ti.com>
* omap_gpmc: change nandecc commandAndreas Bießmann2013-04-08-1/+1
| | | | | | | | | | | | | With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* asm/omap_gpmc.h: consolidate common definesAndreas Bießmann2013-04-08-57/+1
| | | | | | | | | | | | | arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header. Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am335x_evm: Add better timings for the new BeagleBoard DDR3 partTom Rini2013-03-24-0/+17
| | | | | Tested-by: Rao Bodapati <rao@circuitco.com> Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: support ti814x mmc reference clockMatt Porter2013-03-24-0/+5
| | | | | | | TI814x has a 192MHz hsmmc reference clock. Select that clock rate when building for TI814x. Signed-off-by: Matt Porter <mporter@ti.com>
* am33xx: add dmm support to emif4 libraryMatt Porter2013-03-24-0/+5
| | | | | | | Adds a config_dmm() routine to support TI814X DMM configuration. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: add ti814x specific register definitionsMatt Porter2013-03-24-21/+68
| | | | | | | | Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: refactor am33xx mux support and add ti814x supportMatt Porter2013-03-24-227/+566
| | | | | | | | | | AM33XX and TI814X have a similar mux though the pinmux register layout and address space differ. Add a separate ti814x mux include to support the TI814X-specific differences. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
* am33xx: refactor am33xx clocks and add ti814x supportMatt Porter2013-03-24-30/+63
| | | | | | | Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by: Matt Porter <mporter@ti.com>
* am33xx: refactor emif4/ddr to support multiple EMIF instancesMatt Porter2013-03-24-10/+55
| | | | | | | | | | The AM33xx emif4/ddr support closely matches what is need to support TI814x except that TI814x has two EMIF instances. Refactor all the emif4 helper calls and the config_ddr() init function to use an additional instance number argument. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: convert defines from am33xx-specific to generic namesMatt Porter2013-03-24-5/+5
| | | | | | | | Eliminate AM33xx specific names to prepare for TI814x support within AM33xx-land. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: Add required includes to some omap/am33xx codeTom Rini2013-03-24-0/+2
| | | | | | | | | | | | | - In arch/arm/cpu/armv7/omap-common/timer.c, drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files that the driver needs but had been relying on <config.h> to bring in. - In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h> - In am335x_evm.h and pcm051.h don't globally include <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h> as that is the only include which defines things the config uses. Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
* am335x: Enable DDR PHY dynamic power down bit for DDR3 boardsVaibhav Hiremath2013-03-24-0/+1
| | | | | | | | | | | | | Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* Allow AM335x MPU core clock speed to be specified in the board config fileMark Jackson2013-03-22-2/+5
| | | | | | | | | | Allow AM335x MPU core clock speed to be specified in the board config file. To use, add the following to the board's config file:- #define CONFIG_SYS_MPUCLK <desired clock freq in MHz> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
* Allow AM33xx boards to setup GPMC chipselects.Mark Jackson2013-03-11-0/+2
| | | | | | | | | | | | | | | | Expose the enable_gpmc_cs_config() function so AM33xx based boards can register GPMC chip selects. Changes in V4: - Fix checkpatch errors (TAB -> space mangling) Changes in V3: - Fix line wrapping Changes in V2: - Indicate this is for AM33xx (not OMAP2) Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
* omap: consolidate common mmc definitionsNikita Kiryanov2013-03-08-138/+2
| | | | | | | | | The various mmc_host_def.h files are almost identical. Reduce code duplication by moving the similar definitions to a common header file. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* am33xx: support for booting via usbethIlya Yanok2013-02-18-0/+1
| | | | | | | | This patch adds BOOT_DEVICE define for USB booting and fixes spl_board_init function to call arch_misc_init (this is the place there musb is initialized). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+16
| | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
* pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel2013-02-07-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
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