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* ARM: AM43xx: Add functions to enable and disable USB clocksKishon Vijay Abraham I2015-08-28-0/+3
| | | | | | | | | | | Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: AM43xx: Add support for disabling clocks in ubootKishon Vijay Abraham I2015-08-17-0/+1
| | | | | | | | | Add do_disable_clocks() to disable clock domains and module clocks. These clocks are enabled using do_enable_clocks(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* gpio: am43xx: expand gpio supportNikita Kiryanov2015-08-12-0/+4
| | | | | | | | | AM43XX SoCs support up to 192 GPIO signals. Make this amount available to the driver. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* omap: SPL boot devices cleanup and completionPaul Kocialkowski2015-07-27-40/+54
| | | | | | | This cleans up the SPL boot devices for omap platforms and introduces support for missing boot devices. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* omap-common: Common boot code OMAP3 support and cleanupPaul Kocialkowski2015-07-27-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces OMAP3 support for the common omap boot code, as well as a major cleanup of the common omap boot code. First, the omap_boot_parameters structure becomes platform-specific, since its definition differs a bit across omap platforms. The offsets are removed as well since it is U-Boot's coding style to use structures for mapping such kind of data (in the sense that it is similar to registers). It is correct to assume that romcode structure encoding is the same as U-Boot, given the description of these structures in the TRMs. The original address provided by the bootrom is passed to the U-Boot binary instead of a duplicate of the structure stored in global data. This allows to have only the relevant (boot device and mode) information stored in global data. It is also expected that the address where the bootrom stores that information is not overridden by the U-Boot SPL or U-Boot. The save_omap_boot_params is expected to handle all special cases where the data provided by the bootrom cannot be used as-is, so that spl_boot_device and spl_boot_mode only return the data from global data. All of this is only relevant when the U-Boot SPL is used. In cases it is not, save_boot_params should fallback to its weak (or board-specific) definition. save_omap_boot_params should not be called in that context either. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* arm: am437x: mux: Update mux namesBryan De Faria2015-04-23-31/+56
| | | | | | Correct and complete the mux names following AM437x Technical Reference Manual. Signed-off-by: Bryan De Faria <bdefaria-ext@adeneo-embedded.com>
* board: ti: AM43xx: added USB initializtion codeKishon Vijay Abraham I2015-04-14-0/+9
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in am43xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ARM: AM43xx: Enable clocks for USB OTGSS and USB PHYKishon Vijay Abraham I2015-04-14-5/+18
| | | | | | | Enabled clocks for dwc3 controller and USB PHY present in AM43xx. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* clock_am43xx:Set the MAC clock to /5 for OPP100Steve Kipisz2015-02-16-0/+2
| | | | | | | | When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
* arm: am437x: Enable hardware leveling for EMIFJames Doublesin2015-01-13-0/+13
| | | | | | | | | | | | Switch to using hardware leveling for certain parameters on the EMIF rather than using precalculated values. Doing this also means we have a common place now between am437x and am335x for setting emif_sdram_ref_ctrl with a value for the correct delay length. Tested-by: Felipe Balbi <balbi@ti.com> Tested-by: Tom Rini <trini@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* arm: am33xx: Handle NAND+I2C boot-device the same way as NANDStefan Roese2014-12-04-0/+1
| | | | | | | | | | | | | | Re-map NAND&I2C boot-device to the "normal" NAND boot-device. Otherwise the SPL boot IF can't handle this device correctly. Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens Draco leads to this boot-device passed to SPL from the BootROM. With this change, Draco boots just fine into main U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
* am335x: make get_board_rev() function weakIgor Grinberg2014-11-06-2/+0
| | | | | | | | | | | | Current get_board_rev() function returns a hard coded value which is obviously incorrect for the majority of boards. Allow boards to provide a correct implementation by making this function weak. In addition open code the trivial and useless BOARD_REV_ID define and adjust the comment. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com>
* omap3/am33xx: mux: fix several checkpatch issuesIgor Grinberg2014-10-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following checkpatch issues: CHECK: No space is necessary after a cast \#39: FILE: arch/arm/include/asm/arch-am33xx/mux.h:39: +#define PAD_CTRL_BASE 0x800 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \ CHECK: Avoid CamelCase: <CONTROL_PADCONF_JTAG_nTRST> \#284: FILE: arch/arm/include/asm/arch-omap3/mux.h:284: +#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C ERROR: space required after that ',' (ctx:VxV) \#446: FILE: arch/arm/include/asm/arch-omap3/mux.h:446: +#define MUX_VAL(OFFSET,VALUE)\ ^ Cc: Raphael Assenat <raph@8d.com> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Nishanth Menon <nm@ti.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefan Roese <sr@denx.de>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-28-11/+0
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| * ARM: omap: clean redundant PISMO_xx macros used in OMAP3pekon gupta2014-07-25-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PISMO_xx macros were used to define 'Platform Independent Storage MOdule' related GPMC configurations. This patch - Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided by current u-boot infrastructure. - Removes unused redundant macros, which are no longer required after merging of common platform code in following commit commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform +-----------------+-----------------------------------------------------------+ | Macro | Reason for removal | +-----------------+-----------------------------------------------------------+ | PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so | | | configuring GPMC chip-select for smallest allowable | | | segment (GPMC_SIZE_16M) is enough. | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of | | | 128MB (GPMC_SIZE_128M) | +-----------------+-----------------------------------------------------------+ +-----------------+-----------------------------------------------------------+ | PISMO1_NOR | Unused Macros | | PISMO1_NAND | | | PISMO2_CS0 | | | PISMO2_CS1 | | | PISMO1_ONENAND | | | PISMO2_NAND_CS0 | | | PISMO2_NAND_CS1 | | | PISMO1_NOR_BASE | | | PISMO1_NAND_BASE| | | PISMO2_CS0_BASE | | +-----------------+-----------------------------------------------------------+ Signed-off-by: Pekon Gupta <pekon@ti.com>
| * am335x_evm / gumstix pepper: Correct DDR settingsTom Rini2014-07-25-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As noted by clang, we have been shifting certain values out of 32bit range when setting some DDR registers. Upon further inspection these had been touching reserved fields (and having no impact). These came in from historical bring-up code and can be discarded. Similarly, we had been declaring some fields as 0 when they will be initialized that way. Tested on Beaglebone White. Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Ash Charles <ash@gumstix.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-By: Ash Charles <ashcharles@gmail.com>
* | usb: phy: omap_usb_phy: implement usb_phy_power() for AM437xFelipe Balbi2014-07-09-0/+5
| | | | | | | | | | | | | | | | Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that. Signed-off-by: Felipe Balbi <balbi@ti.com>
* | am43xx: Tune the system to avoid DSS underflowsCooper Jr., Franklin2014-07-07-1/+25
| | | | | | | | | | * This is done by limiting the ARM's bandwidth and setting DSS priority in the EMIF controller to ensure underflows do not occur.
* | am43xx: Update EMIF DDR3 Configuration for AM43x GPFranklin S. Cooper Jr2014-07-07-0/+2
|/ | | | | | | | | * Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
* arm:am33xx: Add a scale_vcores() hookTom Rini2014-06-06-0/+1
| | | | | | | Similar to OMAP4/5 we need to scale the voltage up prior to changing the clock frequencies up higher. Add a similar hook to start with. Signed-off-by: Tom Rini <trini@ti.com>
* arch-am33xx: Add defines for timer0-7Hannes Petermaier2014-06-06-6/+29
| | | | | | | | | | | | For usage of timer6 within B&R we need this defines to enable clock modules and clk-source. Also the 'Timer register bits' are expanded. By the way we add defines for all timers within AM335x SoC. Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* armv7:TI: Add <asm/ti-common/sys_proto.h> and migrate omap_hw_init_contextTom Rini2014-05-23-0/+1
| | | | | | | | | | | | | The omap_hw_init_context function (and assorted helpers) is the same for all OMAP-derived parts as when CHSETTINGS are used, that's the same and our DDR base is also always the same. In order to make this common we simply need to update the names of the define for DDR address space which is also common. Cc: Sricharan R. <r.sricharan@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* am33xx: add SSC enable macroYegor Yefremov2014-05-13-0/+2
| | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
* spl: Fix guardian macros in spl.hMarek Vasut2014-03-28-1/+1
| | | | | | | | | Fix the macros guarding the spl.h header for various platforms. Due to a typo and a propagation of it, the macros went out-of-sync with their ifdef check, so fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
* mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-1/+1
| | | | | | | | | omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers ↵pekon gupta2014-03-04-51/+1
| | | | | | | | | | | | | | | into common omap_gpmc.h Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related defines and declarations scattered in SoC platform specific header files like include/asm/arch-xx/cpu.h However, GPMC hardware remains same across all platforms thus this patch merges GPMC data scattered across different arch-xx specific header files into single header file include/asm/arch/omap_gpmc.h Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* mtd: nand: omap: remove redundant platform specific header: arch-xx/omap_gpmc.hpekon gupta2014-03-04-48/+0
| | | | | | | | | | | | | | | | | | | Currently there are two sets of omap_gpmc.h header files (a) arch/arm/include/asm/omap_gpmc.h common header file for all platforms, containing defines and declarations used by GPMC NAND driver. (b) arch/arm/include/asm/arch-xx/omap_gpmc.h SoC platform specific header file containing defines like ECC layout. This patch removes platform specific arch-xx/omap_gpmc.c because: - GPMC hardware engine is common for all SoC platforms hence only (a) is enough - ECC layout is now defined in omap_nand.c driver itself based on ecc-scheme selected. Hence all ECC layout declarations in (b) are redundant. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-5/+27
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator controlDave Gerlach2014-02-21-3/+7
| | | | | | | | | | | | | | | | | | | | | | Schematic indicates GPIO5_7 is to be used for VTT regulator control rather than GPIO0_21 so modify enable_vtt_regulator to reflect this. Without this some boards will experience DDR3 corruption and fail to boot. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [trini: Rework patch against mainline] Signed-off-by: Tom Rini <trini@ti.com>
| * Add support for B&R KWB MotherboardHannes Petermaier2014-02-21-2/+4
| | | | | | | | | | | | | | | | | | | | Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: trini@ti.com
| * am335x: Initial support for Silica Pengwyn boardLothar Felten2014-02-21-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the Silica Pengwyn board [1] The board is based on a TI AM3354 CPU [2] All jumpers removed it will boot from the SDcard, the console is on UART1 accessible via the FDTI -> USB. The on board NAND flash is supported and can act as boot medium, depending on jumper settings. USB Host, USB Device and Ethernet are also provided but untested. [1] http://www.silica.com/product/silica-pengwyn-board.html [2] http://www.ti.com/product/am3354 Signed-off-by: Lothar Felten <lothar.felten@gmail.com> [trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused spi0_pin_mux from Pengwyn support] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-02-21-1/+4
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| * am43xx: Add qspi supportSourav Poddar2014-02-18-1/+4
| | | | | | | | | | | | | | Add QSPI definitions and clock configuration support. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to calleeMasahiro Yamada2014-02-19-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - When CONFIG_DISPLAY_CPUINFO is not enabled, print_cpuinfo() should be defined as an empty function in a header, include/common.h - Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif from caller, common/board_f.c and arch/arm/lib/board.c - Remove redundant prototypes in arch/arm/lib/board.c, arch/arm/include/asm/arch-am33x/sys_proto.h and board/nokia/rx51/rx51.h, keeping the one in include/common.h - Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition where it is missing Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-29-4/+4
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| * ARM: AM335x: Enable DDR dynamic IO power downSatyanarayana, Sandhya2014-01-24-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables dynamically powering down the IO receiver when not performing a read on boards using DDR3. This optimizes both active and standby power consumption. This bit is not set on EVM SK and EVM 1.5 and later boards. Setting the same. This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
* | spl: common: Support for USB MSD FAT image loadingDan Murphy2014-01-24-3/+11
|/ | | | | | | | Add SPL support to be able to detect a USB Mass Storage device connected to a USB host. Once a USB Mass storage device is detected the SPL will load the u-boot.img from a FAT partition to target address. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* ARM: AM43xx: GP_EVM: Add support for DDR3Lokesh Vutla2013-12-18-0/+20
| | | | | | | | | | | | | | | | GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH). Adding details for the same. Below is the brief description of DDR3 init sequence(SW leveling): -> Enable VTT regulator -> Configure VTP -> Configure DDR IO settings -> Disable initialization and refreshes until EMIF registers are programmed. -> Program Timing registers -> Program leveling registers -> Program PHY control and Temp alert and ZQ config registers. -> Enable initialization and refreshes and configure SDRAM CONFIG register Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: EPOS_EVM: Add support for LPDDR2Lokesh Vutla2013-12-18-2/+40
| | | | | | | | | | | | | | | AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A) Adding LPDDR2 init sequence and register details for the same. Below is the brief description of LPDDR2 init sequence: -> Configure VTP -> Configure DDR IO settings -> Disable initialization and refreshes until EMIF registers are programmed. -> Program Timing registers -> Program PHY control and Temp alert and ZQ config registers. -> Enable initialization and refreshes and configure SDRAM CONFIG register -> Wait till initialization is complete and the configure MR registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: clocks: Update DPLL detailsLokesh Vutla2013-12-18-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating the Multiplier and Dividers value for all DPLLs. Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value returned the MPU DPLL is locked. At different OPPs follwoing are the MPU locked frequencies. OPP50 300MHz OPP100 600MHz OPP120 720MHz OPPTB 800MHz OPPNT 1000MHz According to the latest DM following is the OPP table dependencies: VDD_CORE VDD_MPU OPP50 OPP50 OPP50 OPP100 OPP100 OPP50 OPP100 OPP100 OPP100 OPP120 So at different OPPs of MPU it is safest to lock CORE at OPP_NOM. Following are the DPLL locking frequencies at OPP NOM: Core locks at 1000MHz Per locks at 960MHz LPDDR2 locks at 266MHz DDR3 locks at 400MHz Touching AM33xx files also to get DPLL values specific to board but no functionality difference. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: mux: Update mux dataLokesh Vutla2013-12-18-0/+45
| | | | | | | Updating the mux data for UART, adding data for i2c0 and mmc. And also updating pad_signals structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: Update Current Booting devices listLokesh Vutla2013-12-18-3/+10
| | | | | | | Current Booting devices list is different from that of AM33xx. Updating the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43XX: board: add support for reading onboard EEPROMSekhar Nori2013-12-18-0/+2
| | | | | | | | Add support for reading onboard EEPROM to enable board detection. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: Adapt to ti_armv7_common.h config fileLokesh Vutla2013-12-18-1/+1
| | | | | | | Use ti_armv7_common.h config file to inclde the common configs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: AM43xx: Update the base addresses of modulesLokesh Vutla2013-12-18-13/+15
| | | | | | | PRCM, timer base addresses and offsets are different from AM33xx. Updating the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: am437: Fix offset for USB registersDan Murphy2013-12-12-2/+2
| | | | | | Fix the offset for the USB clock registers Signed-off-by: Dan Murphy <dmurphy@ti.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-10-85/+3
|\ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
| * Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-11-25-82/+0
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| | * am335x: fix GPMC config for NAND and NOR SPL bootpekon gupta2013-11-21-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPMC controller is common IP to interface with both NAND and NOR flash devices. Also, it supports max 8 chip-selects, which can be independently connected to any of the devices. But ROM code expects the boot-device to be connected to only chip-select[0]. Thus to resolve conflict between NOR and NAND boot. This patch: - combines NOR and NAND configs spread in board files to common gpmc_init() - configures GPMC based on boot-mode selected for SPL boot. Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx ↵pekon gupta2013-11-21-77/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platforms ELM hardware engine which is used for ECC error detection, is present on all latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM driver should be moved to common drivers/mtd/nand/ folder so that all SoC having on-chip ELM hardware engine can re-use it. This patch has following changes: - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c - update Makefiles - update #include <asm/elm.h> - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c and include in all board configs using AM33xx SoC platform. Signed-off-by: Pekon Gupta <pekon@ti.com>
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