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* common: Pass the boot device into spl_boot_mode()Marek Vasut2016-06-26-1/+1
| | | | | | | | | | | | | | | | | | The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
* imx-common: timer: support i.MX6DQPlusPeng Fan2016-05-24-1/+1
| | | | | | | | To i.MX6DQPlus, osc can be choosed as the source of gpt, so add i.MX6DQPlus support in gpt_has_clk_source_osc. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: sata: return failure if not i.MX6DQPlusPeng Fan2016-05-24-1/+1
| | | | | | | | The i.MX6DQPlus support sata interface, we should not return failure when CPU is i.MX6DQPlus. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: hab: support i.MX6DQPlusPeng Fan2016-05-24-0/+10
| | | | | | | | | Support i.MX6DQPlus, otherwise wrong hab address will be used for i.MX6QDPlus. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Ulises Cardenas <Ulises.Cardenas@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: use simpler runtime cpu dection macrosPeng Fan2016-05-24-48/+20
| | | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
* imx-common: hab: support i.MX6SOLOPeng Fan2016-05-24-5/+10
| | | | | | | | | | | | Add i.MX6SOLO support for hab function. The difference between i.MX6SOLO and i.MX6DL is the number of CPU cores. Besides this, they work the same. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: imx-common: print i.MX 7 SoC names consistentlyStefan Agner2016-05-17-1/+1
| | | | | | | | | According to the product website, the full names are i.MX 7Solo and i.MX 7Dual, whereas the short form is i.MX7S and i.MX7D. Be consistent and print the short form for both supported i.MX 7 SoCs. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* imx6: cache: disable L2 before touching Auxiliary Control RegisterPeng Fan2016-05-06-3/+6
| | | | | | | | | | | | | | | | | | | According PL310 TRM, Auxiliary Control Register " The register must be written to using a secure access, and it can be read using either a secure or a NS access. If you write to this register with a NS access, it results in a write response with a DECERR response, and the register is not updated. Writing to this register with the L2 cache enabled, that is, bit[0] of L2 Control Register set to 1, results in a SLVERR. " So If L2 cache is already enabled by ROM, chaning value of ACR will cause SLVERR and uboot hang. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
* arch/arm/imx-common/Makefile: Update u-boot.uim MKIMAGEFLAGSTom Rini2016-05-02-1/+1
| | | | | | We need to be passing -T firmware here and aren't. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: mx5: Fix NAND image generationMarek Vasut2016-04-19-1/+1
| | | | | | | | | | | | The echo -ne "\xNN" does not work in certain bourne-compatible shells, like dash. The recommended way of hex->char conversion is using printf(1), but there is a pitfall here. The GNU printf does support "\xNN" format, but according to the opengroup documentation, this is not part of POSIX. The POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of compatibility, we use that. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx7: Distinguish between dual and solo versionsFabio Estevam2016-03-09-0/+2
| | | | | | | | | | Read the number of cores in the fuses to distinguish between the dual and solo versions. Tested on a mx7d sabresd and on a mx7solo warp7. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* imx: imx-common: introduce boot auxiliary corePeng Fan2016-02-21-0/+79
| | | | | | | | | | | To boot a auxiliary core in asymmetric multicore system, introduce the new command "bootaux" to do it. Example of boot auxliary core from 0x70000000 where stores the boot head information that should be parsed by auxiliary core, "bootaux 0x70000000". Introduce Kconfig option IMX_BOOTAUX. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx-common: introduce Resource Domain Controller supportPeng Fan2016-02-21-0/+192
| | | | | | | | | Introduce Resource Domain Controller support for i.MX. Now i.MX6SX and i.MX7D supports this feature to assign masters and peripherals to different domains. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx_common: check for Serial Downloader in spl_boot_deviceStefano Babic2016-01-03-0/+8
| | | | | | | | | | | | | | | | | | | Check for bmode before reading the boot device to check if a serial downloader is started, and returns UART if the serial downloader is set, letting SPL to wait for an image if CONFIG_SPL_YMODEM_SUPPORT is set. This allows to load again a SPL based board with imx_usb_loader together with a tool such as kermit. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Eric Nelson <eric@nelint.com> Tested-by: Eric Nelson <eric@nelint.com>
* imx: mx7: compile misc.c for mx7Peng Fan2015-11-12-1/+1
| | | | | | | | | | | Compile misc.c for mx7, since we need related function for lcdif and nand. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: imx-common: power down lcdif before boot osPeng Fan2015-11-12-0/+3
| | | | | | | | | | | | | | Need to call lcdif_power_down to make lcdif in initial state before kernel boot. Similar issue for uboot reset with lcdif enabled, system will hang after serveral times resetting. Need to let lcdif initial state to make all go well. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: hab: add mx7 secure boot supportAdrian Alonso2015-10-30-2/+4
| | | | | | | | | | | | | Add mx7 secure boot support, add helper macro IS_HAB_ENABLED_BIT to get the corresponding bit mask per SoC (mx7 or mx6) to identify if securue boot feature is enabled/disabled. On authenticate_image only check for mmu enabled on mx6 SoC to force pu_irom_mmu_enabled so ROM code can perform mmu cache flush mx7 SoC ROM code does not have this issue as ROM enables cache support based on fuse settings. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: hab: use read_fuse for secure boot settingsAdrian Alonso2015-10-30-5/+12
| | | | | | | Use read_fuse api fuction call to read secure boot fuse settings (enabled/disabled). Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: hab: use unified rom section for mx6sx and mx6ulAdrian Alonso2015-10-30-0/+3
| | | | | | | | | Add CONFIG_ROM_UNIFIED_SECTIONS for mx6sx and mx6ul target platforms to resolve corresponding HAB_RVT_BASE base address, the RVT table contains pointers to the HAB API functions in ROM code. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: hab: rework secure boot support for imx6Adrian Alonso2015-10-30-0/+503
| | | | | | | Rework secure boot support for imx6, move existing hab support for imx6 into imx-common for SoC reuse. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx-common: timer: clean up codePeng Fan2015-10-30-73/+2
| | | | | | | | | | | We can reuse common functions in lib/time.c, but not reimplement functions in imx-common/time.c. Only keep timer_init ,get_tbclk and implement timer_read_counter in imx-common/time.c. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* vf610: refactor DDRMC codeAlbert ARIBAUD \\(3ADEV\\)2015-10-02-117/+76
| | | | | | | | The VF610 DDRMC driver code contains settings which are board-specific. Move these out to boards so that new boards can define their own without having to modify the driver. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* imx: fix coding stylePeng Fan2015-09-24-2/+1
| | | | | | | Fix coding style. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: wrap boot_mode_apply with CONFIG_CMD_BMODEPeng Fan2015-09-24-0/+2
| | | | | | | boot_mode_apply should be applied only with CONFIG_CMD_BMODE enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: consider mux_ctrl_ofs when setting mux_modePeng Fan2015-09-24-4/+3
| | | | | | | | | | | | | | | | | | | | Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch only take i.MX6/7 into consideration. "c3c8a5748897b24f18618047804317167a531dd3 imx-common: fix iomux settings" Use is_soc_type(MXC_CPU_MX7) to avoid breaking other i.MXes when setting mux_mode. In this patch, switch to use "asm/imx-common/sys_proto.h" to avoid build break for "is_soc_type" for vf610 and mx25. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
* imx-common: fix iomux settingsPeng Fan2015-09-20-2/+1
| | | | | | | | | | | | When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs. Also If still checking mux_ctrl_ofs, we have no chance to set iomux for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs for this register is 0. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx-common: cpu: Do not print on invalid temperatureFabio Estevam2015-09-13-2/+2
| | | | | | | | | | | | | | | It is not very useful to have the message below on every boot (especially when we are using early silicon): U-Boot 2015.10-rc2-23945-g37cf215 (Sep 08 2015 - 14:12:14 -0300) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device , so turn the error message into debug level. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx: imx7d: add imx-common cpu support for imx7dAdrian Alonso2015-09-13-2/+26
| | | | | | | | | Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* arm: imx-common: init: rework wdog settings for imx6/imx7Adrian Alonso2015-09-13-0/+21
| | | | | | Rework imx_set_wdog_powerdown to be reused by imx6 and imx7 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx-common: init: extend init_aips to support imx7Adrian Alonso2015-09-13-24/+20
| | | | | | | Extend init_aips to support imx7 SoC, use is_soc_type and is_cpu_type to resolve at run time aips3 settings Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: system counter driver for imx7d and mx6ulAdrian Alonso2015-09-13-0/+126
| | | | | | | | | | Add system counter driver for imx7d and mx6ul imx7 and imx6ul supports system counter timer as well as GPT timer (arch/arm/imx-common/timer.c); The default for imx7 is systemcounter timer. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx: imx-common: init: move arch init common setupAdrian Alonso2015-09-13-1/+101
| | | | | | | | Move common imx6 arch init setup, init.c can be extended and reused to support imx7 SoC keeping init arch common code. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx: common rework cache settings for imx6Adrian Alonso2015-09-13-0/+104
| | | | | | | Rework cache settings for imx6, move cache configuration to imx-common/cache.c so it can be reused for newer SoC Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* thermal: imx_thermal: rework driver to be reusedAdrian Alonso2015-09-13-6/+4
| | | | | | | | Rework imx_thermal driver to be used across i.MX processor that support thermal sensor Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* imx: iomux-v3: add imx7d support for iomuxcAdrian Alonso2015-09-02-0/+18
| | | | | | | | | | | | | | | * Add imx7d support for iomux controller * imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr (0x302C0000) each conroller provides control and mux mode pad registers but shares iomuxc input select register with iomuxc-lpsr IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings for iomuxc-lpsr pads. * Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3 driver for these LPSR pins. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx-common: timer: add i.MX6UL supportPeng Fan2015-08-02-3/+5
| | | | | | Add i.MX6UL GPT timer support. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* imx: mx6ul: Add i.MX6UL CPU typePeng Fan2015-08-02-0/+2
| | | | | | | | | | Add MXC_CPU_MX6UL for i.MX6UL CPU type which is got at runtime from DIGPROG register. But the value has been occupied by MXC_CPU_MX6D which is not real id from DIGPROG register, so change i.MX6D to value 0x67 which was not occupied. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: add cpu type for i.MX6QP/DPPeng Fan2015-08-02-0/+4
| | | | | | | | | | | Add cpu type for i.MX6QP/DP. This patch also fix is_mx6dqp(), since get_cpu_rev can return MXC_CPU_MX6QP and MXC_CPU_MX6DP, we should use: (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)). Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imx: mx6 correct is_soc_rev usagePeng Fan2015-06-27-2/+2
| | | | | | | | is_soc_rev should return a bool value, so use "==", but not "-", change (is_soc_rev(CHIP_REV_1_0) > 0) to (soc_rev() > CHIP_REV_1_0). This patch also add space between "&" for cpu_type(rev) macro. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* imx: drop warning: unused variable 'max_freq'Stefano Babic2015-06-08-1/+2
| | | | | | | max_freq in print_cpuinfo is used only with imx6. Signed-off-by: Stefano Babic <sbabic@denx.de>
* dm: gpio: vf610: Add GPIO driver supportBhuvanchandra DV2015-06-08-0/+26
| | | | | | Add GPIO driver support to Freescale VF610 Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
* Revert "imx: drop warning: unused variable 'max_freq'"Stefano Babic2015-05-28-2/+1
| | | | | | This reverts commit a0117a5e416629932becf079589f5e1859eab90a. Signed-off-by: Stefano Babic <sbabic@denx.de>
* imx: drop warning: unused variable 'max_freq'Stefano Babic2015-05-27-1/+2
| | | | | | | max_freq in print_cpuinfo is used only with imx6. Signed-off-by: Stefano Babic <sbabic@denx.de>
* arm, imx6, i2c: add I2C4 for MX6DLHeiko Schocher2015-05-26-1/+4
| | | | | | add I2C4 modul for MX6DL based boards. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx: mx6: add display of CPU temperature grade in print_cpuinfo()Tim Harvey2015-05-19-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_IMX6_THERMAL is defined print the CPU temperature grade info along with the current temperature. Before: CPU: Temperature 42 C After: CPU: Automotive temperature grade (-40C to 125C) at 42C CPU: Industrial temperature grade (-40C to 105C) at 42C CPU: Extended Commercial temperature grade (-20C to 105C) at 42C Cc: Stefan Roese <sr@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Heiko Schocher <hs@denx.de> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Jason Liu <r64343@freescale.com> Cc: Ye Li <b37916@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Peng Fan <b51431@freescale.com> Tested-by: Nikolay Dimitrov <picmaster@mail.bg> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: mx6: display max cpu frequency in print_cpuinfo()Tim Harvey2015-05-19-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Display the max CPU frequency as well as the current running CPU frequency if the max CPU frequency is available and differs from the current CPU frequency. Before: CPU: Freescale i.MX6Q rev1.2 at 792 MHz After - using an 800MHz IMX6DL (running at its max) CPU: Freescale i.MX6DL rev1.1 at 792 MHz After - using a 1GHz IMX6Q (not running at its max): CPU: Freescale i.MX6Q rev1.2 996 MHz (running at 792 MHz) Cc: Stefan Roese <sr@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Heiko Schocher <hs@denx.de> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Jason Liu <r64343@freescale.com> Cc: Ye Li <b37916@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Peng Fan <b51431@freescale.com> Tested-by: Nikolay Dimitrov <picmaster@mail.bg> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* arm/imx-common: Fix warning 'get_reset_cause' defined but not usedPrabhakar Kushwaha2015-05-19-0/+2
| | | | | | | | | | | Fix below warning arch/arm/imx-common/cpu.c:29:14: warning: ‘get_reset_cause’ defined but not used static char *get_reset_cause(void) Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imx: dek_blob: Add explicit include for mapmemUlises Cardenas2015-05-15-0/+1
| | | | | | | | | | | Boards such as imx6q_sabresd might not have mapmem.h as part of their common library. This causes a build error if the DEK blob command is enabled. Fix: make explicit the include of mapmem.h Signed-off-by: Ulises Cardenas <Ulises.Cardenas@freescale.com> Reviewed-by: Ruchika Gupta <Ruchika.gupta@freescale.com>
* i2c: mxc: refactor i2c driver and support dmPeng Fan2015-05-14-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Introduce a new structure `struct mxc_i2c_bus`, this structure will used for non-DM and DM. 2. Remove `struct mxc_i2c_regs` structure, but use register offset to access registers based on `base` entry of `struct mxc_i2c_bus`. 3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform flags. A new flag is introduced, I2C_QUIRK_FLAG. 4. Most functions use `struct mxc_i2c_bus` as one of the parameters. Make most functions common to DM and non-DM, try to avoid duplicated code. 5. Support DM, but pinctrl is not included. Pinmux setting is still set by setup_i2c, but we do not need bus_i2c_init for DM. 6. struct i2c_parms and struct sram_data are removed. 7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist paramter of bus_i2c_init is modified to i2c index. Add new prototype i2c_idle_bus and force_bus_idle. Since bus_i2c_init is not good for DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus. Board file take the responsibility to implement this function, like this: " int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus) { if (i2c_bus->index == 0) force_bus_idle(i2c_pads_info0); else if (i2c_bus->index == 1) force_bus_idle(i2c_pads_info1); else xxxxxx } " 8. Introduce a weak function, enable_i2c_clk 9. Tested on an i.MX7 platform. Log info: => dm tree Class Probed Name ---------------------------------------- root [ + ] root_driver simple_bus [ ] |-- soc simple_bus [ ] | |-- aips-bus@30000000 simple_bus [ ] | | |-- anatop@30360000 simple_bus [ ] | | `-- snvs@30370000 simple_bus [ ] | |-- aips-bus@30400000 simple_bus [ ] | `-- aips-bus@30800000 i2c [ ] | |-- i2c@30a20000 i2c [ ] | `-- i2c@30a40000 simple_bus [ ] `-- regulators => i2c dev 0 Setting bus to 0 => i2c probe Valid chip addresses: 08 50 => i2c md 8 31 0031: 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: vf610: Move DDR3 initialization to imx-commonSanchayan Maity2015-04-23-0/+281
| | | | | | | | | | In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chosen from the board file. The JEDEC timings are specified using a common ddr3_jedec_timings structure. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
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