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* ARM: dts: uniphier: sync clock/reset controller nodes with LinuxMasahiro Yamada2016-09-23-18/+20
| | | | | | Sync device trees with Linux for easier DT life. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add AIDET nodesMasahiro Yamada2016-07-02-0/+5
| | | | | | | The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of syscon block related with the interrupt controller. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: sync Device Trees with upstream LinuxMasahiro Yamada2016-07-02-1/+1
| | | | | | I periodically sync Device Trees for better maintainability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add SD/MMC host controller nodesMasahiro Yamada2016-02-29-0/+24
| | | | | | This host controller is available for all UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add GPIO controller nodesMasahiro Yamada2016-02-29-0/+203
| | | | | | Make the GPIO driver really active. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add device nodes for MIO control blockMasahiro Yamada2016-02-14-0/+6
| | | | | | | This block provides clock and reset control for MIO (Media I/O) hardware blocks such as USB2.0, SD card, eMMC, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add device nodes for Peripheral control blockMasahiro Yamada2016-02-14-0/+6
| | | | | | | This block provides clock and reset control for peripherals such as UART, I2C, IC card, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add device nodes for System Control blocksMasahiro Yamada2016-02-14-0/+4
| | | | | | These are mainly used for controlling clocks and resets. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add reference clock nodesMasahiro Yamada2016-02-14-0/+4
| | | | | | | | | | Add master clock nodes generated by crystal oscillators. PH1-sLD3, PH1-LD4: 24.576 MHz PH1-Pro4, ProXstream2: 25.000 MHz PH1-Pro5: 20.000 MHz Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add outer cache nodesMasahiro Yamada2015-12-23-2/+27
| | | | | | | These nodes are not parsed by U-Boot for now, but syncing device trees with Linux is helpful for easier diffing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsiMasahiro Yamada2015-12-23-169/+102
| | | | | | | | | | | UniPhier SoCs (except PH1-sLD3) have several nodes in common. Factor out them into uniphier-common32.dtsi. This improves the code maintainability. PH1-sLD3 is so old that it has more or less different register maps than the others. So, it cannot be included in this refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add USB xHCI nodes for PH1-Pro5 and ProXstream2Masahiro Yamada2015-11-11-0/+18
| | | | | | | This makes USB3.0 available on new SoCs/boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: dts: uniphier: add PH1-Pro5 SoC supportMasahiro Yamada2015-08-31-0/+216
Initial version of UniPhier PH1-Pro5 device tree. (Imported from Linux with adjustment for SPDX License Identifier) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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