| Commit message (Collapse) | Author | Age | Lines |
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The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of
syscon block related with the interrupt controller.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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I periodically sync Device Trees for better maintainability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This host controller is available for all UniPhier SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Make the GPIO driver really active.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This allows the EHCI driver to get clocks from device tree.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This block provides clock and reset control for MIO (Media I/O)
hardware blocks such as USB2.0, SD card, eMMC, etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This block provides clock and reset control for peripherals such as
UART, I2C, IC card, etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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These are mainly used for controlling clocks and resets.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add master clock nodes generated by crystal oscillators.
PH1-sLD3, PH1-LD4: 24.576 MHz
PH1-Pro4, ProXstream2: 25.000 MHz
PH1-Pro5: 20.000 MHz
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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These nodes are not parsed by U-Boot for now, but syncing device trees
with Linux is helpful for easier diffing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi. This improves the code
maintainability.
PH1-sLD3 is so old that it has more or less different register maps
than the others. So, it cannot be included in this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The IRQ is not used in U-Boot, but this would be useful to sync
device trees between Linux and U-Boot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This commit imports device tree updates from Linux. It eventually
adds pinctrl-related nodes and properties.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The current GPL only licensing on the device trees makes it very
impractical for other software components licensed under another
license.
To make it easier to reuse them, the device trees for UniPhier
SoCs and boards have already been dual-licensed in Linux.
Follow this trend in U-boot too.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This makes code diff much easier.
Device trees describe hardware attributes, which are independent
of software architecture. It generally makes sense to synchronize
them beyond software projects.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Panasonic's System LSI products, UniPhier SoC family, have been
transferred to Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Each USB port corresponds to the following IP core:
port0: xHCI (0x65a00000) SS+HS
port1: xHCI (0x65c00000) HS (SS PHY is not implemented)
port2: EHCI (0x5a800100) HS
port3: EHCI (0x5a810100) HS
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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EHCI host controllers have a common register interface.
We may wish to implement a generic EHCI driver someday.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Add I2C controller and NAND controller devices. Fix indentation too.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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If CONFIG_OF_CONTROL is defined, search device tree nodes that are
compatible with "panasonic,uniphier-ehci" and take the base address
from their "reg" property.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
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This commit implements the ofdata_to_platdata handler for the UniPhier
serial driver and adds serial device nodes to the device tree sources.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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This commit adds basic device tree sources for UniPhier SoCs/boards.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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