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* ARM: tegra: add DWC EQoS (ethernet) to Tegra186 DTStephen Warren2016-11-07-0/+20
| | | | | | | | | Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the Tegra186 SoC DT so that boards can make use of it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* ARM: tegra: remove stale nvidia, bpmp I2C DT propertyStephen Warren2016-08-25-1/+0
| | | | | | | | | | The nvidia,bpmp property is left over from an old BPMP I2C binding, and shouldn't be present. Remove it from the SoC DT file, and update the I2C driver not to parse it; the value wasn't used for anything any more anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: fix Tegra186 SDHCI clock/reset namesStephen Warren2016-08-25-4/+2
| | | | | | | | | The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI clock be "sdhci" not "sdmmc", and that the clock is accessed by index rather than by name. Fix the Tegra186 DT and MMC driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: fix Tegra186 I2C clock nameStephen Warren2016-08-25-8/+8
| | | | | | | | The Tegra I2C binding dictates that the clock name for the Tegra I2C clock be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add I2C controllers to Tegra186 DTBryan Wu2016-08-04-0/+104
| | | | | | | | | | | Tegra186 has 8 I2C controllers including BPMP I2C. This patch adds the other 7 generic controllers to Tegra186's DT. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, fixed DT node sort order, tweak patch description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add PCIe controller to Tegra186 SoC DTStephen Warren2016-08-04-0/+92
| | | | | | | | | | | | | | | | | | | The Tegra186 PCIe DT content is almost identical to previous chips, except that the: - There are 3 ports instead of 2. - Some physical addresses have moved. - PHY programming is handled by firmware, so CCPLEX DTs don't need to reference any PHY. - The power domain is explicitly represented in DT. This change is mandatory for Tegra186 since standard power domain APIs are used, and should be made to the DT for older SoCs, although we get away without doing so since U-Boot currently uses custom APIs that hard-code power domain IDs. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add BPMP I2C to Tegra186 device treeStephen Warren2016-08-04-0/+9
| | | | | | | | | This allows the BPMP I2C device to be instantiated, which makes it available to other drivers and the user. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add BPMP and dependencies to Tegra186 DTStephen Warren2016-08-04-2/+53
| | | | | | | | | This adds the DT content that's needed to allow board DTs to enable use of BPMP, clocks, resets, GPIOs, eMMC, and SD cards. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: adapt to latest HSP DT bindingStephen Warren2016-08-04-7/+3
| | | | | | | | | | The DT binding for the Tegra186 HSP module apparently wasn't quite final when I posted initial U-Boot support for it. Add the final DT binding doc and adapt all code and DT files to match it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: fix Tegra186 DT GPIO binding headerStephen Warren2016-07-21-1/+1
| | | | | | | | Tegra186 uses different GPIO port IDs compared to previous chips. Make sure the SoC DT file includes the correct GPIO binding header. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mailbox: add Tegra186 HSP driverStephen Warren2016-06-19-0/+13
| | | | | | | | | | Tegra186's HSP module implements doorbells, mailboxes, semaphores, and shared interrupts. This patch provides a driver for HSP, and hooks it into the mailbox API. Currently, only doorbells are supported. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: tegra: add core Tegra186 supportStephen Warren2016-05-31-0/+56
This adds the bare minimum code to support Tegra186, with UART and eMMC working. The empty gpio.h is required because <asm/gpio.h> includes it. A future cleanup round may be able to solve this for all Tegra generations at once. mach-tegra/Makefile is adjusted not to compile anything for Tegra186, but instead to defer everything to mach-tegra/tegra186/Makefile. This allows the SoC code to pick-and-choose which of the C files in the "common" mach-tegra/ directory to compile in based on the SoC's needs. Most of the code is not valid for Tegra186, and this approach removes the need for mach-tegra/Makefile to contain many SoC-specific ifdefs. This approach may be applied to all other Tegra SoCs in a future cleanup round. board186.c is introduced to replace board.c and board2.c. These files currently contain a slew of SoC- and board-specific code that is not valid for Tegra186. This approach avoids adding yet more ifdefs to those files. A future cleanup round may refactor most of board*.c into board-/ SoC-specific functions files thus allowing the top-level functions like board_init_early_f to be shared again. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>