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* | | sun4i: Rename dram_clk_cfg to dram_clk_gateHans de Goede2014-11-25-2/+2
| |/ |/| | | | | | | | | | | | | | | The data sheet just calls it DRAM_CLK_REG, and on sun6i we've both a dram_clk_cfg and dram_clk_gate, and the sun4i reg matches dram_clk_gate on sun6i, so name it the same on sun4i. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-24-0/+36
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| * | ARM: bootm: Allow booting in secure mode on hyp capable systemsHans de Goede2014-11-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Older Linux kernels will not properly boot in hyp mode, add support for a bootm_boot_mode environment variable, which can be set to "sec" or "nonsec" to force booting in secure or non-secure mode when build with non-sec support. The default behavior can be selected through CONFIG_ARMV7_BOOT_SEC_DEFAULT, when this is set booting in secure mode is the default. The default setting for this Kconfig option is N, preserving the current behavior of booting in non-secure mode by default when non-secure mode is supported. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
| * | ARM: Add arch/arm/cpu/armv7/Kconfig with non-secure and virt optionsHans de Goede2014-11-24-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a preparation patch for adding an env variable to choose between secure / non-secure boot on non-secure boot capable systems, specifically this prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-24-31/+116
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| * | | sata: implement reset_sata for dwc_ahsataNikita Kiryanov2014-11-24-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add reset_sata() to the sata driver interface and implement it for dwc_ahsata. This function cleans up after sata_init(), and therefore accepts a device number like sata_init() does. A dummy implementation is provided for the rest of the drivers. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
| * | | arm: mx6: introduce disable_sata_clockNikita Kiryanov2014-11-24-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement disable_sata_clock for mx6 SoCs. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
| * | | mx6: thermal: Check cpu temperature via thermal sensorYe.Li2014-11-21-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add imx6 thermal device to mx6 soc file. Read the cpu temperature using this device to access onchip thermal sensor. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * | | mx6: clock: Add thermal clock enable functionNitin Garg2014-11-21-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add api to check and enable pll3 as required for thermal sensor driver. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * | | imx: consolidate set_chipselect_size functionFabio Estevam2014-11-20-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move MX5 specific set_chipselect_size function into generic i.MX part, such that MX6 based boards are able to use this function as well. While doing this the iomuxc gpr member needed to be consolidated between MX5 and MX6. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: fix exception vectors relocation in imx27Albert ARIBAUD2014-11-20-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3ff46cc4 fixed exception vectors setting in the general ARM case, by either copying the exception and indirect vector tables to normal (0x00000000) or high (0xFFFF0000) vectors address, or setting VBAR to U-Boot's base if applicable. i.MX27 SoC is ARM926E-JS, thus has only normal and high options, but does not provide RAM at 0xFFFF0000 and has only ROM at 0x00000000; it is therefore not possible to move or change its exception vectors. Besides, i.MX27 ROM code does provide an indirect vectors table but at a non-standard address and with the reset and reserved vectors missing. Turn the current vector relocation code into a weak routine called after relocate_code from crt0, and add strong version for i.MX27. Series-Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Stefano Babic <sbabic@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Tested-by: Philippe Reynes <tremyfr@gmail.com> Tested-by: Philippe Reynes <tremyfr@yahoo.fr>
| * | | ARM: mxs: tools: Add support for boot progress display flagAlexey Ignatov2014-11-20-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mkimage -T mxs now support new flag in config file: DISPLAYPROGRESS - makes boot process print HTLLC characters for each BootROM instruction. Signed-off-by: Alexey Ignatov <lexszero@gmail.com>
* | | | Merge git://git.denx.de/u-boot-dmTom Rini2014-11-24-0/+21
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial-uclass.c Signed-off-by: Tom Rini <trini@ti.com>
| * | | | dm: arm: spl: Make driver model linker lists availableSimon Glass2014-11-21-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker lists feature is useful in SPL as it holds the driver model platform data. So don't throw away the lists. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
| * | | | dm: at91: Add platform data for GPIO on at91sam9260-based boardsSimon Glass2014-11-21-0/+14
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards all have the same GPIO arrangement, so add some common platform data that can be used by all boards. Remove the configs which are no longer required. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | tegra: do not descend into empty directoriesMasahiro Yamada2014-11-23-54/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some tegra makefiles only contain a dummy line to generate a built-in.o. Let's do not descend into such directories. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | kbuild: use SoC-specific CONFIG to descend into SoC directoryMasahiro Yamada2014-11-23-8/+56
| | | | | | | | | | | | | | | | | | | | | | | | Use "obj-$(CONFIG_FOO) += foo/" where it is possible. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | kbuild: Descend into SOC directory from CPU directoryMasahiro Yamada2014-11-23-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPUs of some architectures have SOC directories. At present, the build system directly descends into SOC directories from the top Makefile, but it should generally descend into each directory from its parent directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-23-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
* | | | include: move various macros to include/linux/kernel.hMasahiro Yamada2014-11-20-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has imported various utility macros from Linux scattering them to various places without consistency. In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN, container_of, DIV_ROUND_UP, etc. In include/linux/compat.h are min_t, max_t, round_up, round_down, etc. We also have duplicated defines of min_t in some *.c files. Moreover, we are suffering from too cluttered include/common.h. This commit moves various macros that originate in include/linux/kernel.h of Linux to their original position. Note: This commit simply moves the macros; the macros roundup, min, max, min2, max3, ARRAY_SIZE are different from those of Linux at this point. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | replace DIV_ROUND with DIV_ROUND_CLOSESTMasahiro Yamada2014-11-20-4/+5
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: atmel: add sama5d4ek board supportBo Shen2014-11-17-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, spl, at91: add at91sam9260 and at91sam9g45 spl supportHeiko Schocher2014-11-17-96/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [adopt Bo's change in spl.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45Heiko Schocher2014-11-17-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, at91, mpddrc: fix typo in ddr2_init()Heiko Schocher2014-11-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm, at91: generate boot.bin file for all atmel SoCHeiko Schocher2014-11-17-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generate the boot.bin file for all atmel SoC (arm920, arm926, armv7) Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: spl: make css field configurableBo Shen2014-11-17-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock source for master clock can be slow clock, main clock, plla clock or upll clock. So, make the clock source selection field in mckr can be configured. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | ARM: atmel: spl: make initialization more stableBo Shen2014-11-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | We need to make sure the main clock ready field in MCFR is set after switch to main crystal oscillator. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2014-11-17-0/+1932
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| * | arm: rmobile: Add support gose boardNobuhiro Iwamatsu2014-11-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gose board has R8A7793, 1GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF - QSPI - SPI Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | arm: rmobile: Add support R8A7793Nobuhiro Iwamatsu2014-11-10-0/+1928
| | | | | | | | | | | | | | | | | | | | | | | | Renesas R8A7793 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-14-2/+2
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| * | arm: imx: make bmode command work with SPL/U-Boot comboNikita Kiryanov2014-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2014-11-13-5/+641
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| * | | sun6i: Poke magic sram controller register to avoid cache issuesHans de Goede2014-11-13-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this the cache will only work in write-through mode, and as soon as it is put in write-back mode things break. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add dram initialization codeHans de Goede2014-11-13-0/+436
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add full support for dram initialization, using a fixed clock and autodetection of the memory organization (numbers of channels, bus-width, etc.). This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, extended with extra initialization sequences and the autodetect algorithm from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun4i: Rename dram files to dram_sun4i.xHans de Goede2014-11-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding sun6i dram support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add cpucfg register definitionsHans de Goede2014-11-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Not used atm, for future use (e.g. PSCI). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+118
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-13-139/+7
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| * | | ARM: remove unused CPU directoryMasahiro Yamada2014-11-13-132/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no board with CPU "arm_intcm". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | | ARM: cache_v7: Various minor cleanupsThierry Reding2014-11-12-7/+7
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove two gratuituous blank lines, uses u32 (instead of int) as the type for values that will be written to a register, moves the beginning of the variable declaration section to a separate line (rather than the one with the opening brace) and keeps the function signature on a single line where possible. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-11-13-0/+4
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| * | | kconfig: zynq: Add ZYBO boardPeter Crosthwaite2014-11-11-0/+4
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Add a defconfig and Kconfigury for the Digilent ZYBO board. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | kconfig: arm: move "armv8" define to arch/arm/KconfigMasahiro Yamada2014-11-13-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs) collected the default values of CONFIG_SYS_CPU into arch/arm/Kconfig. This commit moves "armv8" to there for consistency. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | kconfig: arm: select CPU_V7 for some new boardsMasahiro Yamada2014-11-13-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds "select CPU_V7" for some new boards that were not covered by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). Redundant "SYS_CPU" defines and "string" directives should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-11-0/+29
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| * | arm: socfpga: Add socfpga_spim_enable() to reset_manager.cStefan Roese2014-11-07-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | arm: socfpga: Add DW master SPI clock to clock_manager.cStefan Roese2014-11-07-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
generated by cgit v1.1 at 2024-11-05 22:55:09 +0000