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| * arm: imx: add i.MX6SLL EVK board supportPeng Fan2016-12-16-0/+7
| * imx: mx6sll: add Kconfig entry for i.MX6SLLPeng Fan2016-12-16-0/+4
| * imx: mx6sll: add clock supportPeng Fan2016-12-16-7/+21
| * imx: clock: gate clk before changing pix clk muxPeng Fan2016-12-16-20/+30
| * imx: mx6sl: add lcdif clock supportPeng Fan2016-12-16-19/+59
| * imx: mx6: lcdif: gate clock before changing muxPeng Fan2016-12-16-0/+10
| * imx: mx6: fix mmdc ch0 clk for 6SLPeng Fan2016-12-16-0/+5
| * board/liteboard: Add support for liteBoardMarcin Niestroj2016-12-16-0/+5
| * udoo_neo: Add thermal supportBreno Lima2016-12-16-0/+2
| * udoo_neo: Move MX6SX configuration to KconfigBreno Lima2016-12-16-0/+1
| * arm: imx: initial support for colibri imx6Max Krummenacher2016-12-16-0/+8
| * arm: imx: initial support for apalis imx6Max Krummenacher2016-12-16-0/+8
* | ARMv8: LS1043A: Enable LS1043A default PSCI supportmacro.wave.z@gmail.com2016-12-15-0/+21
* | ARMv8: Setup PSCI memory and device treemacro.wave.z@gmail.com2016-12-15-1/+32
* | ARMv8: Add basic PSCI frameworkmacro.wave.z@gmail.com2016-12-15-0/+297
* | ARMv8: Add secure sections for PSCI text and datamacro.wave.z@gmail.com2016-12-15-0/+89
* | ARMv8: LS1043A: change macro CONFIG_ARMV8_PSCI definitionmacro.wave.z@gmail.com2016-12-15-5/+27
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* arm: armv7: add us timer for bootstagePatrick Delaunay2016-12-09-1/+6
* armv8: QSPI: Add AHB bus 16MB+ size supportYuan Yao2016-12-05-0/+49
* armv8: ls2080a: Add serdes1 protocol 0x3b supportPriyanka Jain2016-12-05-0/+1
* fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu2016-12-05-1/+6
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-12-04-0/+11
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| * armv8: fsl-layerscape: Move SECURE_BOOT to KconfigYork Sun2016-12-02-0/+5
| * armv7: ls1021a: Move SECURE_BOOT option to KconfigYork Sun2016-12-02-0/+6
* | ARM64: zynqmp: List secondary software boot modesMichal Simek2016-12-02-0/+12
* | ARM64: zynqmp: Force certain bootmode for SPLMichal Simek2016-12-02-1/+1
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-11-30-49/+152
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| * imx6: clock: Enable External Memory Interface [EIM] clock (eim_slow_clock)Lukasz Majewski2016-11-30-0/+14
| * mx6sx: Add initial support for Samtec VIN|ING 2000 boardChristoph Fritz2016-11-30-0/+7
| * mx6sx: Add initial support for UDOO Neo BoardBreno Lima2016-11-29-0/+5
| * ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routinesEric Nelson2016-11-29-2/+9
| * mx6: ddr: add routine to return DDR calibration dataEric Nelson2016-11-29-0/+23
| * mx6: ddr: pass mx6_ddr_sysinfo to calibration routinesEric Nelson2016-11-29-42/+56
| * mx6: ddr: allow 32 cycles for DQS gating calibrationEric Nelson2016-11-29-0/+7
| * Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2016-11-29-15968/+412
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| * | imx: mx6ull: update the REFTOP_VBGADJ settingPeng Fan2016-11-16-5/+26
| * | imx: mx6sx: Disable ENET clock before switching clock parentYe.Li2016-11-16-0/+5
* | | armv7: psci: cpu_off: flush D-Cache before disable D-CachePeng Fan2016-11-29-0/+4
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* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-11-25-41/+347
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| * | armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabledAlison Wang2016-11-22-0/+35
| * | armv8: fsl-layerscape: SMP support for loading 32-bit OSAlison Wang2016-11-22-0/+10
| * | armv8: Support loading 32-bit OS in AArch32 execution stateAlison Wang2016-11-22-16/+76
| * | armv8/fsl-lsch3: Update code to release secondary coresPriyanka Jain2016-11-22-5/+66
| * | armv8: fsl-layerscape: Add NXP LS2088A SoC supportPriyanka Jain2016-11-22-2/+62
| * | armv8: fsl-layerscape : Check SVR for initializing TZASCPriyanka Jain2016-11-22-1/+12
| * | armv8: fsl-layerscape: Update TZASC registers typePriyanka Jain2016-11-22-14/+14
| * | armv8: lsch3: Use SVR based timer base address detectionPriyanka Jain2016-11-22-0/+9
| * | armv8: lsch3: Add generic get_svr() in assemblyPriyanka Jain2016-11-22-0/+11
| * | armv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3Shengzhou Liu2016-11-21-3/+4
| * | armv8: fsl-layerscape: Add README for deploying QSPI imageYuan Yao2016-11-21-0/+42