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* Merge branch 'master' of git://git.denx.de/u-boot-tiWolfgang Denk2010-08-12-6/+6
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| * Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-08-10-30/+78
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| * | miiphy: constify device nameMike Frysinger2010-08-09-6/+6
| | | | | | | | | | | | | | | | | | | | | The driver name does not need to be writable, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | ARM: Add support for MB86R0x SoCsMatthias Weisser2010-08-10-0/+272
| |/ |/| | | | | Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-08-10-1/+1
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| * | MX51EVK: fix return value of get_timer_maskedLi Haibo2010-08-10-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | get_timer_masked() should return current timestamp, not current ticks from hardware register. Tested on one custom board with NAND flash. Without this patch, NAND write always TIMEOUT because get_timer(0) return a big value. This patch applies for u-boot-2010.06 Signed-off-by: Li Haibo <hbli@sinocastel.com>
* | orion5x: allow overriding default mappings windowsAlbert Aribaud2010-08-10-20/+20
| | | | | | | | | | | | | | | | | | | | Turn all ORION5X_DEF{ADR,SZ}_xxx macros into ORION5X_{ADR,SZ}_xxx and allow defining them from board code to override defaults. This is particularly useful for defining board-specific FLASH address and size in board header file rather than having to tweak orion5x code. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
* | ARMV7: Fix udelay for OMAP4Steve Sakoman2010-08-05-9/+0
| | | | | | | | | | | | | | | | | | The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't acceptable for udelay. This patch changes from gptimer1 to gptimer2, which uses sys_clk at 38.4 Mhz. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Add pad mux support for OMAP4Steve Sakoman2010-08-05-0/+11
| | | | | | | | | | | | | | | | | | | | Add functional multiplexing support for OMAP4 pads. Configure all the pads for the OMAP4430 SDP and OMAP4 Panda boards Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tiWolfgang Denk2010-07-16-0/+46
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| * ARMV7: Add basic gpmc initialization for OMAP4Steve Sakoman2010-07-15-0/+46
| | | | | | | | | | | | | | | | This patch adds a gpmc_init function for OMAP4 and adds calls to gpmc_init for existing OMAP4 boards: panda and sdp4430 Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-07-15-6/+118
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| * | PXA: Add support for LMS285GF05 into pxafbMarek Vasut2010-07-14-0/+34
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Voipac PXA270 LCD SupportMarek Vasut2010-07-14-0/+33
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add OneNAND booting support to start.SMarek Vasut2010-07-14-5/+43
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Enable PXAFB for PXA27X and PXA3XXMarek Vasut2010-07-14-1/+8
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* | | Merge branch 'master' of ../masterWolfgang Denk2010-07-15-2/+10
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| * mvgbe: add support for orion5x GbE controllerAlbert Aribaud2010-07-12-0/+8
| | | | | | | | | | | | | | | | | | Add definitions and initialization in orion5x for mvgbe. Add orion5x in mvgbe SoC includes. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * mvgbe: support SoCs other than kirkwoodAlbert Aribaud2010-07-12-2/+2
| | | | | | | | | | | | | | | | | | Rename all references to kirkwood in mvgbe symbols throughout the whole codebase. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | ARMV7: Add basic support for TI OMAP4Steve Sakoman2010-07-05-2/+324
| | | | | | | | | | | | | | | | | | This patch adds minimum support for OMAP4. Code which can be shared between OMAP3 and OMAP4 is placed in arch/arm/cpu/armv7/omap-common Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7Steve Sakoman2010-07-05-3/+3
|/ | | | | | | | | | | | The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9 Cortex A8 and A9 both belong to the armv7 architecture, hence the name change. The two architectures are similar enough that substantial code can be shared. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Make sure that argv[] argument pointers are not modified.Wolfgang Denk2010-07-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Prepare v2010.06-rc3v2010.06-rc3Wolfgang Denk2010-06-23-70/+70
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2010-06-22-4/+4
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| * Fix wrong orion5x MPP and GIPO writel argumentsAlbert Aribaud2010-06-22-4/+4
| | | | | | | | | | | | | | Orion5x MPP and GPIO setting code had writel arguments the wrong way around. Fixed and tested. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
* | ARM: Align stack to 8 bytesVitaly Kuzmichev2010-06-22-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM ABI requires that the stack be aligned to 8 bytes as it is noted in Procedure Call Standard for the ARM Architecture: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html Unaligned SP also causes the problem with variable-length arrays allocation when VLA address becomes less than stack pointer during aligning of this address, so the next 'push' in the stack overwrites first 4 bytes of VLA. Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com> Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400) Tested-by: Wolfgang Denk <wd@denx.de>
* | arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older toolsWolfgang Denk2010-06-18-4/+4
|/ | | | | | | | | | | | | | | | | | | | | The push / pop instructions used in this file are available only with more recent tool chains: cache.S: Assembler messages: cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}' Change push/pop into stmfd/ldmfd instructions to support older versions of binutils as well. I verified that the modified source code generates exactly the same binary code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rix <tom@bumblecow.com>
* Merge branch 'fix' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-06-17-1/+4
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| * PXA: Align stack to 8 bytesMarek Vasut2010-06-13-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Part of this patch is by: Mikhail Kshevetskiy. Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour is undefined. The issue was observed when working with the NAND code, which was rendered disfunctional. Also, the vsprintf() function had serious problems with printing 64bit wide long longs. After aligning the stack, this wrong behaviour is no longer present. Tested on: Marvell Littleton PXA310 board Toradex Colibri PXA320 board Aeronix Zipit Z2 PXA270 handheld Voipac PXA270 board Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* | Initial support for Marvell Orion5x SoCAlbert Aribaud2010-06-17-0/+863
| | | | | | | | | | | | | | | | | | This patch adds support for the Marvell Orion5x SoC. It has no use alone, and must be followed by a patch to add Orion5x support for serial, then support for the ED Mini V2, an Orion5x-based product from LaCie. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
* | AM35x: Add support for EMIF4Vaibhav Hiremath2010-06-08-0/+169
| | | | | | | | | | | | | | | | | | This patch adds support for the EMIF4 interface available in the AM35x processors. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap3: Consolidate SDRC related operationsVaibhav Hiremath2010-06-08-166/+206
| | | | | | | | | | | | | | | | | | | | | | Consolidated SDRC related functions into one file - sdrc.c And also replaced sdrc_init with generic memory init function (mem_init), this generalization of omap memory setup is necessary to support the new emif4 interface introduced in AM3517. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap3: Calculate CS1 size only when SDRC isVaibhav Hiremath2010-06-08-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | initialized for CS1 From: Vaibhav Hiremath <hvaibhav@ti.com> The patch makes sure that size for SDRC CS1 gets calculated only when the CS1 SDRC is initialized. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARM1176: TI: TNETV107X soc initial supportCyril Chemparathy2010-06-08-0/+1286
| | | | | | | | | | | | | | | | | | TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a bunch on on-chip integrated peripherals. This is an initial commit with basic functionality, more commits with drivers, etc. to follow. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARM1176: Coexist with other ARM1176 platformsCyril Chemparathy2010-06-08-21/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current ARM1176 CPU specific code is too specific to the SMDK6400 architecture. The following changes were necessary prerequisites for the addition of other SoCs based on ARM1176. Existing board's (SMDK6400) configuration has been modified to keep behavior unchanged despite these changes. 1. Peripheral port remap configurability The earlier code had hardcoded remap values specific to s3c64xx in start.S. This change makes the peripheral port remap addresses and sizes configurable. 2. U-Boot code relocation support Most architectures allow u-boot code to run initially at a different address (possibly in NOR) and then get relocated to its final resting place in RAM. Added support for this capability in ARM1176 architecture. 3. Disable TCM if necessary If a ROM based bootloader happened to have initialized TCM, we disable it here to keep things sane. 4. Remove unnecessary SoC specific includes ARM1176 code does not really need this SoC specific include. The presence of this include prevents builds on other ARM1176 archs. 5. Modified virt-to-phys conversion during MMU disable The original MMU disable code masks out too many bits from the load address when it tries to figure out the physical address of the jump target label. Consequently, it ends up branching to the wrong address after disabling the MMU. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARM1136: Fix cache_flush() error and correct cpu_init_crit() commentsGeorge G. Davis2010-06-01-2/+3
|/ | | | | | | | | | | | | | | The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0" instruction which means "Invalidate Both Caches" when in fact the intent is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7, c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate Both Caches" instruction to insure that memory is consistent with any dirty cache lines. Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so that they correctly describe the actual ARM1136 CP15 C7 Cache Operations used. Signed-off-by: George G. Davis <gdavis@mvista.com>
* a320evb: fix udelay / __udelay confusionWolfgang Denk2010-05-21-1/+1
| | | | | | | | | | | | Fix the following compiler problems: arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay': /home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay' lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here lib/libgeneric.a(time.o): In function `udelay': time.c:(.text+0x1c): undefined reference to `__udelay' Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: */timer.c: fix spelling and vertical alignmentWolfgang Denk2010-05-21-18/+18
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MX51: Fix MX51 CPU detect messageFabio Estevam2010-05-05-1/+1
| | | | | | | | | | | | | | Fix MX51 CPU detect message. Original string was: CPU: Freescale i.MX51 family 3.0V at 800 MHz which can be misinterpreted as 3.0 Volts instead of the silicon revision. ,change it to: CPU: Freescale i.MX51 family rev3.0 at 800 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX25 print arm clock instead of mpllclk on bootJohn Rigby2010-04-30-1/+1
| | | | | | | | | Replace call to imx_get_mpllclk with imx_get_armclk to show frequency of ARM core instead of mpll internal bus in print_cpuinfo. Signed-off-by: John Rigby <jcrigby@gmail.com> CC: Stefano Babic <sbabic@denx.de>
* Moved board specific values in config fileStefano Babic2010-04-30-1/+4
| | | | | | | | The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic <sbabic@denx.de>
* arm, mx27: add support for SDHC1 pin initHeiko Schocher2010-04-30-0/+17
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* SAMSUNG: make s5p common gpio functionsMinkyu Kang2010-04-30-144/+0
| | | | | | | | Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: Move cpu/$CPU to arch/arm/cpu/$CPUPeter Tyser2010-04-13-0/+101616
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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