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* ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>Tom Rini2012-09-27-5/+7
| | | | | | | Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: SPL: Only call mem_malloc_init if configuredTom Rini2012-09-27-0/+2
| | | | | | | | We can only attempt to setup a malloc pool if CONFIG_SYS_SPL_MALLOC_START is defined, and not all boards require it. Make the call depend on the define. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.cTom Rini2012-09-27-13/+3
| | | | | | | This detection code doesn't (and can't) do anything currently, so remove. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: SPL: Rename omap_boot_mode to spl_boot_mode()Tom Rini2012-09-27-4/+4
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* ARM: SPL: Rename omap_boot_device to spl_boot_deviceTom Rini2012-09-27-7/+7
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* omap-common: SPL: Fix whitespace in omap-common/u-boot-spl.lds.Pavel Machek2012-09-27-3/+3
| | | | | Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* omap-common: Fix typo in save_boot_params() in lowlevel_init.STom Rini2012-09-27-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini2012-09-27-6/+8
| | | | | | | | Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
* spl_mmc: Make FAT checks / calls guarded with CONFIG_SPL_FAT_SUPPORTTom Rini2012-09-27-0/+4
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* ARM: arm1176: Define arch_cpu_init() at the SoC levelStephen Warren2012-09-25-8/+25
| | | | | | | | | | | | | Commit 86c6326 "ARM: arm1176: enable instruction cache in arch_cpu_init()" defined arch_cpu_init() in a file that is shared across all arm1176 SoCs. tnetv107x already implemented this function, which caused linking to break. Move the new conflicting arch_cpu_init() into arm1176/bcm2835/init.c so that it doesn't conflict; grep indicates this function is usually defined at the SoC-level, not the CPU-level, at least for ARM. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Marek Vasut <marex@denx.de>
* Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-09-21-770/+92
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| * MX: set a common place to share code for Freescale i.MXStefano Babic2012-09-10-672/+0
| | | | | | | | | | | | | | | | | | | | Up now only MX5 and MX6 can share code, because they have a common source directory in cpu/armv7. Other not armv7 i.MX can profit of the same shared code. Move these files into a directory accessible for all, similar to plat-mxc in linux. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * mx31: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-10/+10
| | | | | | | | | | | | | | | | | | | | | | Define default SoC input clock frequencies for i.MX31 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Helmut Raiger <helmut.raiger@hale.at>
| * Fix mx31_decode_pllBenoît Thébaudeau2012-09-06-3/+5
| | | | | | | | | | | | | | | | The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
| * mx35 timer: Switch to 32-kHz sourceBenoît Thébaudeau2012-09-06-17/+27
| | | | | | | | | | | | | | | | | | | | Switch the mx35 timer driver to the 32-kHz clock source to avoid calling mxc_get_clock() again and again, and to be consistent with the timer drivers of other i.MX SoCs. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx35: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-28/+17
| | | | | | | | | | | | | | | | | | Define default SoC input clock frequencies for i.MX35 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx25: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-9/+9
| | | | | | | | | | | | | | | | | | | | Define default SoC input clock frequencies for i.MX25 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Matthias Weisser <weisserm@arcor.de>
| * mx35: Fix clock dividersBenoît Thébaudeau2012-09-06-30/+18
| | | | | | | | | | | | | | | | | | The clock dividers that were used do not match at all the reference manual. They were either completely broken, or came from an early silicon revision incompatible with the current one. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
| * mx35: Fix decode_pllBenoît Thébaudeau2012-09-06-3/+6
| | | | | | | | | | | | | | | | The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
| * MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDSMarek Vasut2012-09-04-3/+5
| | | | | | | | | | | | | | | | | | | | Use proper struct-based access for this register in the SPL code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-24/+24
| | | | | | | | | | | | | | | | | | | | Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | tegra20: usb: rework set_host_modeLucas Stach2012-09-10-16/+21
| | | | | | | | | | | | | | | | | | | | | | This allows for two things: - VBus GPIO may be used on other ports than the OTG one - VBus GPIO may be low active if specified by DT Signed-off-by: Lucas Stach <dev@lynxeye.de> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Tom Warren <TWarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Add NAND support to funcmuxSimon Glass2012-09-07-0/+7
| | | | | | | | | | | | | | | | Add selection of NAND flash pins to the funcmux. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | am33xx: Remove redundant timer configTom Rini2012-09-04-20/+0
|/ | | | | | | | | | We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that has been configuring and enabling the timer, so remove our code that does the same thing by different methods. Tested on EVM GP, SK-EVM and Beaglebone. Signed-off-by: Tom Rini <trini@ti.com>
* edminiv2: orion5x: fix GPIO inits and valuesAlbert ARIBAUD2012-09-03-0/+2
| | | | | | | | | Orion5x did not actually write GPIO output values or input polarities, and ED Mini V2 had bad or missing values for GPIO settings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* atmel: at91sam9x5: fix name error for spiBo Shen2012-09-01-2/+2
| | | | | | | Fix the name error Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mxs: Convert timeout parameter to 'unsigned int'fabio.estevam@freescale.com2012-09-01-2/+4
| | | | | | | | | For representing a timeout value, it makes more sense to pass it as 'unsigned int'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* gpio: add gpio api support to mx27 (v4)trem2012-09-01-5/+6
| | | | | | | The gpio api has been tested on an armadeus apf27. Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr> Acked-by: Stefano Babic <sbabic@denx.de>
* mxs: Rename 'mx28_dram_init' to 'mxs_dram_init'Otavio Salvador2012-09-01-2/+2
| | | | | | | | | | | | | | | | The DRAM initialization, after SPL has complete, is exactly the same for all mxs SoCs so we should name it accordinly. The following boards has been changed: * apx4devkit * m28evk * mx28evk * sc_sps_1 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
* mxs: Only build internal Ethernet controller for i.MX28Otavio Salvador2012-09-01-1/+1
| | | | | | | | | The internal Ethernet controller is only available on i.MX28 processors so it needs to use CONFIG_MX28 guardian to avoid having this code called in others. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* mx35: Move clock enums to clock.hBenoît Thébaudeau2012-09-01-2/+2
| | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx35 iomux: Remove unused macroBenoît Thébaudeau2012-09-01-2/+0
| | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: config: Allow different target generation in elftosb callOtavio Salvador2012-09-01-0/+0
| | | | | | | | The elftosb call needs to use a target param specific for i.MX28. This patch allow for later addition of i.MX233. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* mx35: Add cpu_mmc_init()Benoît Thébaudeau2012-09-01-1/+14
| | | | | | | | Add cpu_mmc_init() function to make it easy to init a single eSDHC instance. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx5/6: Fix cpu_mmc_init() return valueBenoît Thébaudeau2012-09-01-4/+2
| | | | | | | | | Do not pretend to have initialized mmc successfully if CONFIG_FSL_ESDHC is not defined. Instead, only implement a custom cpu_mmc_init() when it does something. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* imx-common/cmd_bmode.c: add imx bmode (bootmode) commandTroy Kisky2012-09-01-0/+187
| | | | | | | | | | | | This is useful for forcing the ROM's usb downloader to activate upon a watchdog reset. Or, you can boot from either SD Card. Currently, support added for MX53 and MX6Q Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Note: MX53 support untested. Acked-by: Stefano Babic <sbabic@denx.de>
* mx5: cosmetic: Clean up lowlevel_initBenoît Thébaudeau2012-09-01-23/+23
| | | | | | | | | | Coding style cleanup: - Remove useless parentheses. - Use tabs for indentations and alignments. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx5/6 timer: Round up tick_to_time() valueBenoît Thébaudeau2012-09-01-1/+1
| | | | | | | | | | Round up tick_to_time() value instead of truncating it. This avoids stopping waits instantly for low usec values, and this generally guarantees that the code always waits for at least the requested duration. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx5: Enable dcacheBenoît Thébaudeau2012-09-01-0/+8
| | | | | | | | | Now that the main i.MX features work fine with dcache enabled, enabled it by default if CONFIG_SYS_DCACHE_OFF is not defined. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx25: Enable dcacheBenoît Thébaudeau2012-09-01-0/+8
| | | | | | | | | Now that the main i.MX features work fine with dcache enabled, enabled it by default if CONFIG_SYS_DCACHE_OFF is not defined. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: Shuffle around the power management codeMarek Vasut2012-09-01-6/+3
| | | | | | | | | | Move some function calls to a more appropriate place, so they're called only when needed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: Drop the cp15 reconfiguration from SPLMarek Vasut2012-09-01-42/+0
| | | | | | | | | | | | | | | The SPL doesn't need the CP15 reconfiguration, as that's what the BootROM does for us already. Moreover, when the CP15 is reconfigured and the code returns control to BootROM, the USB boot works no more. Remove the code and allow [1] to work properly as well. [1] http://git.bfuser.eu/?p=marex/mxsldr.git;a=summary Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mxs: Convert sys_proto.h prefixes to 'mxs'Otavio Salvador2012-09-01-20/+20
| | | | | | | The sys_proto.h functions (except the boot modes) are compatible with i.MX233 and i.MX28 so we use 'mxs' prefix for its methods. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Remove not required include of iomux-mx28.hOtavio Salvador2012-09-01-1/+0
| | | | | | | The iomux-mx28.h include is not required on spl_mem_init.c so it has been droped. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Remove not required explicit iomux-mx28.h includeOtavio Salvador2012-09-01-1/+0
| | | | | | | | The iomux header is included on sys_proto.h so to avoid SoC specific header inclusion. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* arm:exynos: Enable data cache at exynos based processors.Łukasz Majewski2012-09-01-0/+8
| | | | | | | | | This patch enables the L1 data cache for systems based on Samsung Exynos processor. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: support display port phy control functionDonghwa Lee2012-09-01-0/+21
| | | | | | | | This patch support display port phy control function. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: support display system register controlDonghwa Lee2012-09-01-0/+18
| | | | | | | | This patch supports display block system regisger control. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: support exynos5 lcd clock controlDonghwa Lee2012-09-01-1/+107
| | | | | | | | This patch support exynos5 lcd clock control. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: EXYNOS: fixed compiler warning messageJaehoon Chung2012-09-01-1/+4
| | | | | | | | | | | Removed [-Wuninitialized] warning message. The fout_sel is assigned to "-1" by default. And start, gpio_func is initialized to 0. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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