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* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-08-50/+389
|\ | | | | | | | | This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
| * davinci: fixed cpu resetDavide Bonfanti2012-12-10-1/+1
| | | | | | | | | | | | | | | | The reset procedure works on watchdog timer while before it was modifying TIMER_1 registers. Tested on DM365. Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
| * omap: emif: configure emif only when requiredLokesh Vutla2012-12-10-5/+36
| | | | | | | | | | | | | | | | DMM_LISA_MAP registers program whether memory is mapped on particular EMIF or not. Irrespective of these registers EMIF is getting configured. Correcting the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * OMAP: Tweak omap-common/Makefile since reset.S -> reset.cRobert P. J. Day2012-12-10-3/+2
| | | | | | | | | | | | | | | | Git commit d417d1db5f9092d125ddea882ced77eaa5f3d236 replaced the omap-common file reset.S with reset.c, but the Makefile was not adjusted for that. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * omap4: Add comments on some "#endif"s for readability.Robert P. J. Day2012-12-10-3/+3
| | | | | | | | | | | | No functional changes, simply for readability. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * omap3: Add a few comments to "#endif"s for readability.Robert P. J. Day2012-12-10-4/+4
| | | | | | | | | | | | | | No functional changes, just more comments for readability when a preprocessor check spans more than a few lines, and for consistency. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * Pass sdrc timing values through board_sdrc_timings structurePeter Barada2012-12-10-20/+16
| | | | | | | | | | | | | | | | | | Instead of passing individual registers by value to board_get_mem_timings, pass a board_mem_timings structure pointer for the board files to fill in. Pass same structure pointer to write_sdrc_timings. This saves about 90 bytes of space in SPL. Signed-off-by: Peter Barada <peter.barada@logicpd.com>
| * am33xx: add ELM supportMansoor Ahamed2012-12-10-0/+218
| | | | | | | | | | | | | | | | | | AM33XX has Error Location Module (ELM) that can be used in conjuction with GPMC controller to implement BCH codes fully in hardware. This code is mostly taken from arago tree. Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * am33xx: NAND supportIlya Yanok2012-12-10-0/+108
| | | | | | | | | | | | | | | | TI AM33XX has the same GPMC controller as OMAP3 so we could just use the existing omap_gpmc driver. This patch adds adds required definitions/intialization. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * OMAP: include sys_proto.h from boot-commonIlya Yanok2012-12-10-0/+1
| | | | | | | | | | | | | | Include asm/arch/sys_proto.h for gpmc_init prototype. Without this we get a warning while building for AM335x. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * omap3/mem.c: remove unused definesAndreas Bießmann2012-12-10-14/+0
| | | | | | | | | | | | | | | | These GPMC_CS defines are a leftover from prior gpmc_init(). Commit 187af954 removed the need for these definitions but missed to remove them. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com>
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*---. \ Merge samsung, imx, tegra into u-boot-arm/masterAlbert ARIBAUD2012-12-22-257/+358
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as well as a few manual merge fixes.
| | | * Merge remote-tracking branch 'u-boot/master' into u-boot-arm-mergedAllen Martin2012-12-19-0/+249
| | | |\ | |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| | | * exynos:pinmux: Add pinmux support for i2cPiotr Wilczek2012-12-11-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinmux for I2C for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * exynos:clock: Add i2c clockPiotr Wilczek2012-12-11-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds i2c clock for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * mxs: i2c: Implement algorithm to set up arbitrary i2c speedMarek Vasut2012-12-11-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This algorithm computes the values of TIMING{0,1,2} registers for the MX28 I2C block. This algorithm was derived by using a scope, but the result seems correct. The resulting values programmed into the registers do not correlate with the contents in datasheet. When using the values from the datasheet, the I2C clock were completely wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
| | * | Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic2012-12-08-0/+169
| | |\ \ | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/woodburn_common.h board/woodburn/woodburn.c These boards still use the old old PMIC framework, so they do not merge properly after the power framework was merged into mainline. Fix all conflicts and update woodburn to use Power Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | mxs: SPL: Generalize memory initializationOtavio Salvador2012-12-07-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a generic 'dram_vals[]' array that has the full initialization sequence and rename the initialization method so it doesn't has a frequency on its name. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | mxs: Staticize SPL functionsMarek Vasut2012-12-04-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MXS SPL didn't mark local functions "static". Fix it. This also makes the SPL smaller by roughly 300 bytes. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Properly setup VDDD in power supply setup codeMarek Vasut2012-12-04-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory setup code adjusted the VDDD voltage. Remove this adjustment and configure the VDDD voltage correctly in the power supply setup code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Implement common function to setup VDDxMarek Vasut2012-12-04-170/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement common function to setup the VDDIO, VDDD and VDDA voltage. Right now, there are two almost identical functions to setup VDDIO and VDDD, which is prone to breakage. Pull out the differences into constant structure and pass them as an argument to the common function. Moreover, the function has almost identical loops for setting higher and lower VDDx voltage. Merge these two loops. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-0/+169
| |\ \ \ |/ / / / | | | _ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * | OMAP3: am35x: add musb functionsIlya Yanok2012-11-20-0/+76
| | | | | | | | | | | | | | | | | | AM35XX specific functions for integrated USB PHY/MUSB IP. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | am33xx: init OTG hardware and new musb gadget driverIlya Yanok2012-11-20-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | AM33xx has support for dual port MUSB OTG controller. This patch adds initialization for the controller using new MUSB gadget driver and ether gadget. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2012-11-25-2/+6
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| * | mx5: Mark lowlevel_init board-specific codeBenoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mx6: clock: Only show CSPI clock if CSPI is enabledFabio Estevam2012-11-19-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | If a board does not enable CSPI, there is no need to show the CSPI clock frequency as part of the 'clock' command. Reported-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com>
| * | mx5: Print CSPI clock in 'clock' commandFabio Estevam2012-11-19-1/+3
| | | | | | | | | | | | | | | | | | Print CSPI clock in 'clock' command. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | | arm: Add control over cachability of memory regionsSimon Glass2012-11-19-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for adjusting the L1 cache behavior by updating the MMU configuration. The mmu_set_region_dcache_behaviour() function allows drivers to make these changes after the MMU is set up. It is implemented only for ARMv7 at present. This is needed for LCD support, where we want to make the LCD frame buffer write-through (or off) rather than write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add SOC support for display/lcdWei Ni2012-11-19-0/+410
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add support for PWMSimon Glass2012-11-19-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add display support to funcmuxSimon Glass2012-11-19-0/+37
| | | | | | | | | | | | | | | | | | | | | Add support for a default pin mapping for display1. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Use const for pinmux_config_pingroup/table()Simon Glass2012-11-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | These two functions don't actually modify their arguments so add a const keyword. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | EXYNOS: Add clock for SPIHatim RV2012-11-15-0/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add api to calculate and set the clock for SPI channels Signed-off-by: James Miller <jamesmiller@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS5: Add pinmux support for SPIRajeshwari Shinde2012-11-15-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux support for SPI channels Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add clock for I2SRajeshwari Shinde2012-11-15-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock support for I2S Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add pinmux for I2SRajeshwari Shinde2012-11-15-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux support for I2S1 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | ARM: arm1176: Define arch_cpu_init() for s3c64xxAshok Kumar Reddy2012-11-15-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | arch_cpu_init() is removed from cpu level to SOC level for arm1176 in commit 4ea6d6b,the same is done for s3c64xx Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | dm: wdt: Move s5p watchdog timer to drivers/watchdog/Marek Vasut2012-11-15-60/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: David Müller <d.mueller@elsoft.ch> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Clock: Add common function for pll rate calculationMinkyu Kang2012-11-15-64/+38
| | | | | | | | | | | | | | | | | | | | | | | | Moved the common code to calculate pll clock rate to new function exynos_get_pll_clk(). Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* | | arm:exynos4:pinmux: Modify the gpio function for mmcPiotr Wilczek2012-11-15-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinmux settings for Exynos4 for mmc0 and mmc2 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | arm1136: Fix enable_caches()Benoît Thébaudeau2012-11-10-10/+12
|/ / | | | | | | | | | | | | | | enable_caches() did not enable icache if CONFIG_SYS_ICACHE_OFF was not defined but CONFIG_SYS_DCACHE_OFF was. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololiteTroy Kisky2012-11-10-8/+24
| | | | | | | | | | | | | | | | | | | | Previously, the same value was returned for both mx6dl and mx6solo. Check number of processors to differeniate. Also, a freescale patch says that sololite has its cpu/rev stored at 0x280 instead of 0x260. I don't have a sololite to verify. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | Merge git://git.denx.de/u-bootStefano Babic2012-11-10-5124/+182
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| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-05-140/+200
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| | * socfpga/spl: Remove malloc.hVikram Narayanan2012-11-04-1/+0
| | | | | | | | | | | | | | | | | | Remove unused header Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
| | * socfpga/spl: Remove timer_init from spl_board_initVikram Narayanan2012-11-04-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Timer is initialized already in board_init_r function in (common/spl/spl.c) No need to initialize it again Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com>
| | * Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-03-13/+50
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| | | * omap3: Rework board.c for !CONFIG_SYS_L2CACHE_OFFTom Rini2012-10-30-13/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings currently. Re-order functions so that we don't have that anymore. Signed-off-by: Tom Rini <trini@ti.com>
| | | * am33xx: Enable UART{1,2,3,4,5} clocksAndrew Bradford2012-10-25-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232 cape or the am335x_evm daughterboard, enable the required clocks for the UART in use. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
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