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* zmx25: Fix build warning due to 'get_reset_cause' defined but not usedFabio Estevam2011-09-30-23/+23
| | | | | | | | | | | | When building the zmx25 target we get: Configuring for zmx25 board... generic.c:108: warning: 'get_reset_cause' defined but not used Fix this warning by defining get_reset_cause only if CONFIG_DISPLAY_CPUINFO is defined. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* MX5: Clean up the output of "clocks" commandMarek Vasut2011-09-30-7/+9
| | | | | | | | | | | | | | | | The new output looks like this: > clocks PLL1 800 MHz PLL2 665 MHz PLL3 216 MHz AHB 133000 kHz IPG 66500 kHz IPG PERCLK 665000 kHz Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* MX5: Add AHB clock reporting and fix IPG clock reportingMarek Vasut2011-09-30-9/+27
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* MX5: Modify the PLL decoding algorithmMarek Vasut2011-09-30-10/+56
| | | | | | | | | | The PLL decoding algorithm didn't take into account many configuration bits. Adjust it according to Linux kernel. Also, add PLL4 for MX53. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Tested-by: Jason Liu <Jason.hui@linaro.org>
* MX31: Disable watchdog during low-power modesFabio Estevam2011-09-30-2/+2
| | | | | | | | | | | Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX31: Improve readability for reset causeFabio Estevam2011-09-30-1/+1
| | | | | | | | | Currently the reset cause is printed like: CPU: Freescale i.MX31 rev 2.0 at 531 MHz.Reset cause: POR Improve readability by adding a new line like it is done on other i.MX boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ARM: mx25: Print the source of resetFabio Estevam2011-09-30-1/+24
| | | | | | Print the source of reset during boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ARM: mx25: Print the silicon revisonFabio Estevam2011-09-30-1/+29
| | | | | | Print the silicon revison during boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* arm, davinci, da8xx: add cpuinfoHeiko Schocher2011-09-30-2/+14
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci, am1808: add lowlevel functions for booting from NORHeiko Schocher2011-09-30-0/+429
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: add NOR Boot Configuration WordHeiko Schocher2011-09-30-0/+9
| | | | | | | | | | to add the "NOR Boot Configuration Word" on AM18xx based boards, define CONFIG_SYS_DV_NOR_BOOT_CFG. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: add internal WDT support for AM1808 cpusHeiko Schocher2011-09-30-0/+31
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: move davinci_timer in header fileHeiko Schocher2011-09-30-14/+1
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* net, davinci_emac: add KSZ8864 switchHeiko Schocher2011-09-30-1/+69
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Fix compile warningSanjeev Premi2011-09-30-1/+1
| | | | | | | | | | Building without option CONFIG_DISPLAY_CPUINFO leads to this warning: sys_info.c:50:14: warning: 'rev_s_37xx' defined but not used Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common: reorganize spl.cSimon Schwarz2011-09-30-177/+247
| | | | | | | | | | split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems with missing defines if a board does not use mmc or nand. This includes adding spl_ prefix to some functions which are now public. spl_image_t is now a public type. Added some of the common functions to omap-common.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: implement boot parameter savingSimon Schwarz2011-09-30-3/+12
| | | | | | | Implements the saving of boot params passed by OMAP3 ROM code. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: new SPL structure supportSimon Schwarz2011-09-30-0/+35
| | | | | | | | Support for the new spl structure. Using the interface defined by Aneesh V for OMAP4 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common: add nand spl supportSimon Schwarz2011-09-30-3/+93
| | | | | | | Add NAND support for the new SPL structure. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Configure RAM bank 0 if in SPLSimon Schwarz2011-09-30-1/+31
| | | | | | | | | | OMAP3 relied on the memory config done by X-loader or Configuration Header. This has to be reworked for the implementation of a SPL. This patch configures RAM bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000 are added to mem.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common/omap4: relocate early UART clock setupSimon Schwarz2011-09-30-1/+2
| | | | | | | | | | | | | | | Moves the early UART clock setup setup_clocks_for_console() from preloader_console_init() to s_init() of OMAP4. This is done to prepare for OMAP3 integration. This patch was posted seperatly to the mailinglist but I decidet - since it is a prereqesit for this patch to add it. Former port to ML: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* led: remove camel casing of led identifiers globallyJason Kridner2011-09-13-31/+31
| | | | | | | | | | | | | | | Result of running the following command to address Wolfgang's comment about camel case: for file in `find . | grep '\.[chS]$'`; do perl -i -pe 's/(green|yellow|red|blue)_LED_(on|off)/$1_led_$2/g' $file; done Discussion: http://patchwork.ozlabs.org/patch/84988/ Signed-off-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: IO settingsAneesh V2011-09-13-25/+62
| | | | | | | | Tuning some IO settings for better performance and power. And consolidate all such IO settings at one place. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: make SDRAM init work for ES1.0 siliconAneesh V2011-09-13-51/+20
| | | | | | | | | | | | SDRAM init was not working on ES1.0 due to a programming error. A pointer that was passed by value to a function was set in function emif_get_device_details(), but the effect wouldn't be seen in the calling function. The issue came out while testing for ES1.0 because ES1.0 doesn't have any SDRAM chips connected to CS1 Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: gpio: generic changes after changing APISanjeev Premi2011-09-13-2/+3
| | | | | | | | This patch contains the generic changes required after change to generic API in the previous patch. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: gpio: Use generic APISanjeev Premi2011-09-13-31/+82
| | | | | | | | | | | | | | | Convert all OMAP specific functions to use the common API definitions in include/asm/gpio.h. In the process, made few additional changes: - Use -EINVAL consistently. -1 was used in many places. - Removed one-liner static functions that were used only once. Replaced the content as necessary. - Combines implementation of functions omap_get_gpio_dataout() and omap_get_gpio_datain(). To do so, new static function _get_gpio_direction() was added. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Add 37xx ESx revision numbers.Howard D. Gray2011-09-12-1/+12
| | | | | | | | OMAP3: Add 37xx ESx revision numbers. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP: Add function to get state of a GPIO outputJoel A Fernandes2011-09-12-0/+20
| | | | | | | | Read directly from OMAP_GPIO_DATAOUT to get the output state of the GPIO pin Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Minor coding style cleanup.Wolfgang Denk2011-09-11-5/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* tegra2: fix warning: "assert" redefinedWolfgang Denk2011-09-10-8/+0
| | | | | | | | | | | | Commit 21726a7 "Add assert() for debug assertions" caused build warnings for all tegra2 based boards: clock.c:36:1: warning: "assert" redefined In file included from clock.c:29: include/common.h:144:1: warning: this is the location of the previous definition Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org>
* KS8695: move TIMER_ definitions before code useGreg Ungerer2011-09-10-8/+8
| | | | | | | | | | | | | Move the TIMER_ definitions before they are used in KS8695 timer.c code. Fixes: timer.c: In function ‘timer_init’: timer.c:37: error: ‘TIMER_COUNT’ undeclared (first use in this function) timer.c:37: error: (Each undeclared identifier is reported only once timer.c:37: error: for each function it appears in.) timer.c:38: error: ‘TIMER_PULSE’ undeclared (first use in this function) Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
* PXA: FIX: Deep-sleep return address in stored in PSPRMarek Vasut2011-09-07-1/+1
| | | | | | FIX for a typo-bug: The address is stored in PSPR, not PSSR. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* MX31: fix missing mxc_get_clk() callStefano Babic2011-09-07-0/+1
| | | | | | Add missing case to be used in common MXC code. Signed-off-by: Stefano Babic <sbabic@denx.de>
* omap24xx: fix 'reset_timer_masked' declaration errorWolfgang Denk2011-09-07-11/+9
| | | | | | | | | | | | | Commit 17659d7 "Timer: Remove reset_timer_masked()" introduced a static declaration for reset_timer_masked() which causes build errors: timer.c:45: error: static declaration of 'reset_timer_masked' follows non-static declaration include/asm/u-boot-arm.h:70: error: previous declaration of 'reset_timer_masked' was here Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Graeme Russ <graeme.russ@gmail.com> Cc: Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: remove broken "impa7" board.Wolfgang Denk2011-09-07-102/+5
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Marius Gröger <mag@sysgo.de>
* ARM: remove broken "ep7312" board.Wolfgang Denk2011-09-07-8/+8
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Marius Gröger <mag@sysgo.de>
* Makefile : fix generation of cpu related asm-offsets.hStefano Babic2011-09-07-11/+1
| | | | | | | | | | | commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks building on a different directory with the O= parameter. The patch wil fix this issue, generating always asm-offsets.h before the other targets. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de> CC: Wolfgang Denk <wd@denx.de>
* dm3730: enable dpll5Eric Benard2011-09-04-0/+1
| | | | | | | | which is used to provide 120MHz to USB EHCI This allows EHCI to work on BeagleBoard XM Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* da8xx: add support for multiple PLL controllersSudhakar Rajashekhara2011-09-04-11/+19
| | | | | | | | | Modify clk_get() function in cpu file to work for multiple PLL controllers. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3:clock: check cpu_family before enabling clks for IVA & CAMVaibhav Hiremath2011-09-04-4/+10
| | | | | | | | | | | In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and ISP-CAMERA modules have been removed. So add check for cpu_family before enabling clocks for these modules, else this impacts subsequent power consumption and system suspend/resume functionality. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3:clock: configure GFX clock to 200MHz for AM/DM37xVaibhav Hiremath2011-09-04-1/+1
| | | | | | | | | | | | AM/DM37x is another OMAP3 variant, where the GFX clock has been boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change. HW Errata: Due to dependency of TV out clock of 54MHz, it is not possible to configure GFX to 192MHz. So as per HW errats, the recommended GFX clock is 200MHz (=CORE_CLK/2). Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* armv7: cache: remove flush on un-aligned invalidateAneesh V2011-09-04-6/+8
| | | | | | | | | | Remove the flush of boundary cache-lines done as part of invalidate on a non cache-line boundary aligned buffer Also, print a warning when this situation is recognized. Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: stronger barrier for cache-maintenance operationsAneesh V2011-09-04-6/+6
| | | | | | | | set-way operations need a DSB after them to ensure the operation is complete. DMB may not be enough. Use DSB after all operations instead of DMB. Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: enable caches at system start-upAneesh V2011-09-04-0/+16
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* Tegra2: Use clock and pinmux functions to simplify codeSimon Glass2011-09-04-33/+14
| | | | Signed-off-by: Simon Glass <sjg@chromium.org>
* Tegra2: Add additional pin multiplexing featuresSimon Glass2011-09-04-1/+53
| | | | | | | This adds an enum for each pin and some functions for changing the pin muxing setup. Signed-off-by: Simon Glass <sjg@chromium.org>
* Tegra2: Add more clock supportSimon Glass2011-09-04-36/+176
| | | | | | This adds functions to enable/disable clocks and reset to on-chip peripherals. Signed-off-by: Simon Glass <sjg@chromium.org>
* Tegra2: Add microsecond timer functionSimon Glass2011-09-04-6/+12
| | | | | | | These functions provide access to the high resolution microsecond timer and tidy up a global variable in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* MX: MX35 / MX5: uniform clock command with powerpcStefano Babic2011-09-04-4/+4
| | | | | | | | | | | There was already a command to show the processor clocks for PowerPC (clocks). For i.MX, the "clockinfo" command was introduce. The patch sets the same command name used on PowerPC. A nasty and not needed newline is also dropped in the help for the command. Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: MX51: PLL errata workaroundDavid Jander2011-09-04-0/+38
| | | | | | | | | | | | | This is a port of the official PLL errata workaround from Freescale to mainline u-boot. The PLL's in the i.MX51 processor can go out of lock due to a metastable condition in an analog flip-flop when used at high frequencies. This workaround implements an undocumented feature in the PLL (dither mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. Signed-off-by: David Jander <david@protonic.nl>
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