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* arm: mx6: ddr: configure MMDC for slow_pdNikita Kiryanov2014-09-09-0/+1
| | | | | | | | | | | | | | | | According to MX6 TRM, both MMDC and DRAM should be configured to the same powerdown precharge. Currently, mx6_dram_cfg() configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for 'slow exit (DLL off)' (MR0[12] = 0). Configure MMDC for slow pd. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Tim Harvey <tharvey@gateworks.com>
* arm: mx6: ddr: do not write into reserved bitNikita Kiryanov2014-09-09-1/+1
| | | | | | | | | Bit 16 in mapsr register is in a reserved field. Don't write to it. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* arm: mx6: ddr: cleanupNikita Kiryanov2014-09-09-141/+137
| | | | | | | | | No functional changes. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* mx6: add clock enabling functionsNikita Kiryanov2014-09-09-0/+90
| | | | | | | | | Add functions to enable/disable clocks for UART, SPI, ENET, and MMC. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2014-09-09-12/+111
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| * arm: exynos: Add get_lcd_clk and set_lcd_clk callbacks for Exynos5420Ajay Kumar2014-09-05-6/+79
| | | | | | | | | | | | | | | | | | | | | | Add get_lcd_clk and set_lcd_clk callbacks for Exynos5420 needed by exynos video driver. Also, configure ACLK_400_DISP1 as the parent for MUX_ACLK_400_DISP1_SUB_SEL. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm: exynos: Add RPLL for Exynos5420Ajay Kumar2014-09-05-0/+16
| | | | | | | | | | | | | | | | | | RPLL is needed to drive the LCD panel on Exynos5420 based boards. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * odroid: kconfig: add odroid_defconfigPrzemyslaw Marczak2014-09-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | This config is valid for two devices: - Odroid X2, - Odroid U3. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arch:exynos: boot mode: add get_boot_mode(), code cleanupPrzemyslaw Marczak2014-09-05-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces code clean-up for exynos boot mode check. It includes: - removal of typedef: boot_mode - move the boot mode enum to arch-exynos/power.h - add bootmode for sequence: eMMC 4.4 ch4 / SD ch2 - add new function: get_boot_mode() for OM[5:1] pin check - update spl boot code Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Changes v5: - exynos: boot mode: add missing bootmode (1st:EMMC 4.4 / 2nd:SD ch2) Changes v6: - none changes v7: - change boot mode name: BOOT_MODE_MMC to BOOT_MODE_SD Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: pinmux: fix the gpio names for exynos4x12 mmcPrzemyslaw Marczak2014-09-05-2/+2
| | | | | | | | | | | | | | | | | | | | This change fixes the bad gpio configuration for the exynos dwmmc. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Beomho Seo <beomho.seo@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | ARM: DRA72: DDR3: Add emif settings for 666MHz clockR Sricharan2014-09-04-3/+96
| | | | | | | | | | | | | | | | On DRA72x, EMIF supports DDR3 upto 667MHz. Adding the required settings for DDR3 at 666MHz and enabling it. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | keystone2: use readl/writel functions instead of redefinitionKhoronzhuk, Ivan2014-09-04-25/+19
| | | | | | | | | | | | | | | | There is no reason to redefine pure readl/writel functions. So remove this redundancy. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Acked-by: Vitaly Andrianov <vitalya@ti.com>
* | ARM: keystone: clock: use correct BWADJ field mask for PASSPLLCTL0Khoronzhuk, Ivan2014-09-04-1/+1
|/ | | | | | | The mask for BWADJ field of PASSPLLCTL0 register has to be 0xff, but by mistake, here is used shift instead of mask, so correct it. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* nomadik: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+21
| | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Nomadik board select menu to nomadik/Kconfig. Move also common settings (CONFIG_SYS_CPU="arm926ejs" and CONFIG_SYS_SOC="nomadik"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* highbank: kconfig: move common settingsMasahiro Yamada2014-08-30-0/+19
| | | | | | | Move Highbank-specific settings to highbank/Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Rob Herring <robh@kernel.org>
* orion5x: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+21
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Orion5x board select menu to orion5x/Kconfig. Move also common settings (CONFIG_SYS_CPU="arm926ejs" and CONFIG_SYS_SOC="orion5x"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* keystone: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+24
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Keystone board select menu to keystone/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="keystone"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com>
* omap5: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+29
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP5 board select menu to omap5/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap5"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
* omap4: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+29
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP4 board select menu to omap4/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap4"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
* omap3: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+107
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP3 board select menu to omap3/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap3 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com>
* davinci: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+79
| | | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Davinci board select menu to davinci/Kconfig. Move also common settings (CONFIG_SYS_CPU="arm926ejs" and CONFIG_SYS_SOC="davinci"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* exynos: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+55
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Exynos board select menu to exynos/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="exynos"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* kirkwood: kconfig: refactor Kconfig and defconfigMasahiro Yamada2014-08-30-0/+89
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the KirkWood board select menu to kirkwood/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="arm926ejs" and CONFIG_SYS_SOC="kirkwood"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Prafulla Wadasdkar <prafulla@marvell.com> Cc: Luka Perkov <luka@openwrt.org>
* versatile: kconfig: move common settingsMasahiro Yamada2014-08-30-0/+23
| | | | | | Move Versatile-specific settings to versatile/Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* rmobile: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+37
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Rmobile board select menu to rmobile/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="rmobile"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* tegra: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Tegra board select menu to tegra/Kconfig. Insert the Tegra SoC select menu between the arch select and the board select. Architecture select |-- Tegra Platform (Tegra) |- Tegra SoC select (Tegra20 / 30 / 114 / 124) |- Board select Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="tegra*") and always "select" CONFIG_SPL as follows: config TEGRA bool select SPL Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* zynq: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-0/+43
| | | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Zynq board select menu to zynq/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="zynq"). Refactor board/xilinx/zynq/MAINTAINERS too. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* arm: Add missing .vectors section to linker scriptsBenoît Thébaudeau2014-08-30-0/+6
| | | | | | | | | | Commit 41623c9 'arm: move exception handling out of start.S files' missed some linker scripts. Hence, some boards no longer had exception handling linked since this commit. Restore the original behavior by adding the .vectors section to these linker scripts. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* arm: bcmnsp: Add bcmnsp u-architectureScott Branden2014-08-30-0/+26
| | | | | | | | Base support for the Broadcom NSP SoC. Based on iproc-common and the SoC specific reset function. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: bcmcygnus: Add bcmcygnus u-architectureScott Branden2014-08-30-0/+27
| | | | | | | | Base support for the Broadcom Cygnus SoC. Based on iproc-common and the SoC specific reset function. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: iproc: Initial commit of iproc architecture codeScott Branden2014-08-30-0/+325
| | | | | | | | The iproc architecture code is present in several Broadcom chip architectures, including Cygnus and NSP. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: bcm281xx: Add Ethernet Clock supportJiandong Zheng2014-08-30-0/+178
| | | | | | | | Enable Ethernet clock when Broadcom StarFighter2 Ethernet block (CONFIG_BCM_SF2_ETH) is enabled. Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: ep9315: Add .vectors section to lds and remove obsolete ldsSergey Kostanbaev2014-08-30-58/+0
| | | | | | | | | However ep9315 don't use interrupt vectors during startup, but _startup symbol is used inside uboot to calculate actual monitor size. Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
* socfpga: initialize designware ethernetPavel Machek2014-08-30-0/+17
| | | | | | | | Enable initialization fo designware ethernet controller. With this patch, ethernet works in my configuration, provided I set ethernet address in the environment. Signed-off-by: Pavel Machek <pavel@denx.de>
* socfpga: Fix SOCFPGA build error for Altera dev kitChin Liang See2014-08-29-1/+5
| | | | | | | | | | | | | To fix the build error when build for Altera dev kit, not virtual target. At same time, set the build for Altera dev kit as default instead virtual target. With that, U-Boot is booting well and SPL still lack of few drivers. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* socfpga: fix clock manager register definitionPavel Machek2014-08-29-56/+56
| | | | | | | | | Structure defining clock manager hardware was wrong, leading to wrong registers being accessed and hang in MMC init. This fixes structure to match hardware. Signed-off-by: Pavel Machek <pavel@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-08-29-68/+126
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| * ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+3
| | | | | | | | | | | | | | | | | | | | DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7: Enable software leveling for dra7Sricharan R2014-08-25-68/+32
| | | | | | | | | | | | | | | | | | | | Currently hw leveling is enabled by default on DRA7/72. But the hardware team suggested to use sw leveling as hw leveling is not characterized and seen some test case failures. So enabling sw leveling on all DRA7 platforms. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * keystone2: use EFUSE_BOOTROM information to configure PLLsVitaly Andrianov2014-08-25-0/+91
| | | | | | | | | | | | | | | | | | This patch reads EFUSE_BOOTROM register to see the maximum supported clock for CORE and TETRIS PLLs and configure them accordingly. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-08-29-1/+2
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| * | ARM: zynq: Remove spl.hMichal Simek2014-08-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Do not specify own zynq specific SPL macros because there is no need for that. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | zynq: spl: Add vectors section to linker scriptPeter Crosthwaite2014-08-08-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vectors section contains the _start symbol which is used as the program entry point. Add it to the linker script in same fashion as done for regular u-boot. This allows for correct generation of an spl elf with a non-zero entry point. A similar change was applied to sunxi platform in "sunxi: Fix u-boot-spl.lds to refer to .vectors" (sha1: 9e5f80d823e3fd2a685b10ecf02009e34b86cff9) This also allows for placement of the vector table at the hivecs location by setting the TEXT_BASE to 0xffff0000. Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2014-08-29-1/+56
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| * | | ARM: tegra: Use mem size from MC rather than ODMDATAStephen Warren2014-08-18-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In at least Tegra124, the Tegra memory controller (MC) has a register that controls the memory size. Read this to determine the memory size rather than requiring this to be redundantly encoded into the ODMDATA. This way, changes to the BCT (i.e. MC configuration) automatically updated SW's view of the memory size, without requiring manual changes to the ODMDATA. Future work potentially required: * Clip the memory size to architectural limits; U-Boot probably doesn't and won't support either LPAE or Tegra's "swiss cheese" memory layout, at least one of which would be required for >2GB RAM. * Subtract out any carveout required by firmware on future SoCs. Based-on-work-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: Disable VPRBryan Wu2014-08-18-0/+39
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra114 and Tegra124 platforms, certain display-related registers cannot be accessed unless the VPR registers are programmed. For bootloader, we probably don't care about VPR, so we disable it (which counts as programming it, and allows those display-related registers to be accessed). This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c in Chromium OS U-Boot project. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Signed-off-by: Bryan Wu <pengw@nvidia.com> [acourbot: ensure write went through, vpr.c style changes] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <TWarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-3/+180
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| * | | mx6sx: Adjust enable_fec_anatop_clock() for mx6soloxFabio Estevam2014-08-20-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | Configure and enable the ethernet clock for mx6solox. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | ARM: mx6: Handle the MMDCx_MDCTL COL field capricesMarek Vasut2014-08-20-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The COL field value cannot be easily calculated from the desired column number. Instead, there are special cases for that, see the datasheet, MMDCx_MDCTL field description, field COL . Cater for those special cases. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | mx6: add support of multi-processor commandGabriel Huau2014-08-20-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows u-boot to load different OS or Bare Metal application on different cores of the i.MX6 SoC. For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1. Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Stefano Babic <sbabic@denx.de>
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