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path: root/arch/arm/cpu/tegra114-common/pinmux.c
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* Tegra114: Dalmore: Add pad config tables/code based on pinmux codeTom Warren2013-03-14-0/+194
| | | | | | | | | | | | | | | Pad config registers exist in APB_MISC_GP space, and control slew rate, drive strengh, schmidt, high-speed, and low-power modes for all of the pingroups in Tegra30. This builds off of the pinmux way of constructing init tables to configure select pads (SDIOCFG, for instance) during pinmux_init(). Currently, no padcfg entries exist. SDIO3CFG will be added when the MMC driver is added as per the TRM to work with the SD-card slot on Dalmore E1611. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entryTom Warren2013-03-14-1/+1
| | | | | | | | This caused CAM_MCLK's pinmux reg to be locked out, since the table parsing code couldn't find a matching entry for VI_ALT3 and wrote garbage to the register. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra114: pinmux: Update pinmux tables & code, fix a bug w/SDMMC3 initTom Warren2013-03-14-87/+127
| | | | | | | | | | | | | Use the latest tables & code from our internal U-Boot repo. The SDMMC3_CD, CLK_LB_IN and CLK_LB_OUT offsets in the pingroup table were off by a few indices, causing the pinmux init code to write bad data to the PINMUX_AUX_ regs. This also enabled the lock bit, which made it impossible to reconfig the pads correctly for SDMMC3 (SD card on Dalmore) operation. Also fixes SPI_CS2_N, USB_VBUS_EN0, HDMI_CEC and UART2_RXD/TXD muxes. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: Add common CPU (shared) filesTom Warren2013-02-11-0/+506
These files are used by both SPL and main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>